It’s not surprising that Analog to Digital Converters (ADC’s) now employ several techniques to accomplish higher speeds and resolutions than their simpler counterparts. Enter the Delta-Sigma (Δ∑) ADC which combines a couple of techniques including oversampling, noise shaping and digital filtering. That’s not to say that you need several chips to accomplish this, these days single chip Delta-Sigma ADCs and very small and available for a few dollars. Sometimes they are called Sigma-Delta (∑Δ) just to confuse things, a measure I applaud as there aren’t enough sources of confusion in the engineering world already.
I’m making this a two-parter. I will be talking about some theory and show the builds that demonstrate Delta-Sigma properties and when you might want to use them.
Looking at the diagram below we see four of the most prevalent ADC technologies to include Delta-Sigma . We covered SAR, Flash and Dual-Slope in the last post and each had their particular area where they did well. Sigma-Delta offers a combination of high resolution and moderate throughput.
Delta-Sigma Block Diagram
A block diagram of the Delta-Sigma converter shows three main sections: The Delta-Sigma Modulator, and the two part digital filter that combines an Integrator and a Decimator.
The job of the Modulator is to convert the analog input into a single bit modulated digital stream. The Integrator accumulates this single bit stream into a multi-bit value representing an average of the signal but with lots of extra information. Finally the Decimator removes the extra unneeded information resulting in an output that is accurate but adheres to the correct minimal size.
The Delta-Sigma Modulator is the core of the ADC and is responsible for digitizing the input analog signal while reducing noise through a couple of techniques, namely oversampling and noise shaping.
As seen in the block diagram here, the Delta-Sigma Modulator consists of a difference amplifier that sums in the feedback of the output, an integrator which acts as noise shaping in that it removes noise in the lower frequencies, a 1 bit comparator, and a switch which effectively feeds back an inverted form of the results of the last sample. Due to the feedback path the digital output represents the difference in signal from sample to sample.
To demonstrate that there really is a sine wave hidden in the digital hash I set the oscilloscope to average the input over several samples.
In any ADC there is a noise or error term due to the inaccuracies of the quantization process, which is called… wait for it… quantization noise. This is essentially the difference between the real value and the perceived value as sampled by the ADC.
The higher the resolution of the ADC the less noise there will be as a result. This is true to the point where we can state mathematically that the Effective Number of Bits (ENOB) of the ADC can be determined by the ratio of the signal amplitude to the quantization noise amplitude known as the Signal to Noise Ratio (SNR). Note that I am ignoring all of the other sources of noise and non-linearity for the purposes of this discussion.
ENOB = (SNR-1.76)/6.02db
Likewise we can predict the SNR due to quantization noise based on the resolution of the ADC (N)
SNR = (6.02 x N) + 1.76db
The Frequency Domain
In order to display the amplitude of a signal compared to the noise we can view everything in the Frequency domain such as the output of a spectrum analyzer. When viewed in the frequency domain the left side of the display typically represents the lowest frequencies with high frequencies on the right. The amplitude of signal is represented by the height with greater amplitude at the top. This is not to be confused with the time domain which is what we typically see on an oscilloscope.
Here the frequency domain is the large display and the time domain is in the inset on the bottom right. Changing the frequency causes the “hump” to move left to right on the main display while the effect can be seen in the time domain as a change in cycle time.
A very effective noise reduction technique is to increase the sample frequency, a technique known as oversampling. This has the effect of taking the quantization noise and spreading it out over a larger part of the spectrum. In a following step a filter is applied to remove the noise in the portion of the spectrum that is only inhabited by the noise we induced. So while it’s not really removing the noise outright, it is reducing the noise in amplitude in the area of interest near our signal. A basic rule of thumb is that for every 4x increase in sampling frequency the effective number of bits (ENOB) will increase by one.
Here we can see oversampling in action: Note the change in noise level when changing the sampling clock from 5Mhz to 20 Mhz.
The Delta-Sigma ADC utilizes this noise reduction technique but then goes one step further utilizing a technique known as noise shaping. As the Delta-Sigma modulator uses an integration stage or two, it has a natural traffic shaping effect where the noise at the low end is reduced at the expense of the upper end of the spectrum. Once again we aren’t really removing the noise outright, but it is reducing the noise in amplitude in the area of interest near our signal.
Using the ADC Evaluation Software to display the noise shaping.
The combination of these technique is the basis for the high resolution of the Delta-Sigma ADC (remember low noise allows high resolution).
These are the basic concepts behind how Delta-Sigma ADC’s work. In the next part of this series I will demonstrate how to create a digital filter and show some live results on the bench. Here’s a shot of that hardware to whet your appetite. Subscribe to our YouTube channel and keep an eye on the front page for that next installment. You can also check out the Bil Herd Originals video playlist to hold you over until the next one is ready.
Let me know any questions you have in the comments below and I’ll try to work the answers into the next article.