Introduction To MOSFET Switching Losses

Metal-oxide semiconductor field-effect transistors (MOSFETs) see common use in applications ranging from the very small (like CPU transistors) to very large (power) switching applications. Although its main advantage is its high power efficiency, MOSFETs are not ideal switches with a perfect on or off state. Understanding the three main sources of switching losses is crucial when designing with MOSFETs, with a recent All About Circuits article by [Robert Keim] providing a primer on the subject.

As it’s a primer, the subthreshold mode of MOSFET modes of operation is omitted, leaving the focus on the linear (ohmic) mode where the MOSFET’s drain-source is conducting, but with a resistance that’s determined by the gate voltage. In the saturated mode the drain-source resistance is relatively minor (though still relevant), but the turn-on time (RDS(on)) before this mode is reached is where major switching losses occur. Simply switching faster is not a solution, as driving the gate incurs its own losses, leaving the circuit designer to carefully balance the properties of the MOSFET.

For those interested in a more in-depth study of MOSFETs in e.g. power supplies, there are many articles on the subject, such as this article (PDF) from Texas Instruments.

17 thoughts on “Introduction To MOSFET Switching Losses

  1. “but the turn-on time (RDS(on)) before this mode is reached is where major switching losses occur”
    Turn-on time is not RDS(on). RDS(on) is the on-resistance (between Drain and Source, hence the name) when fully switched on (under certain operating conditions).

    1. Yep. Turn on time will be a function of gate capacitance and your gate drive current. Along with some other oddities (look up the miller effect; basically that capacitance itself isn’t constant)

      So I’d recommend running a simulation using that specific part if you’re designing something where switching losses are getting close to the edge of what the mosfet can handle.

      From a design standpoint, using a gate driver ic really helps also. You can get inexpensive ones that drive both parts of an h bridge, and automatically prevent shoot through, and generate the high side gate voltage (letting you use n fets for both switches).

      1. And don’t forget on-resistance depends on temperature. Thermal runaway is a real thing. on-resistance depends on temperature and temperature depends on on-resistance. A positive feedback that causes MOSFETs with insufficient cooling to overheat quicker than expected.
        The specified maximum peak current is what won’t destroy MOSFETs if done for a few milliseconds.
        The specified maximum continuous current what won’t destroy MOSFETs before they start heating up.
        But the actual maximum continuous current depends on the cooling and is lower than the specified maximum continuous current.

  2. Many power MOSFETs these days are actually multiple transistors constructed in parallel on the same die. They work fine when all the transistors are hard on or hard off as in a switching application. But the moment you try to run those transistors in linear mode (in the Ohmic region) some of the parallel transistors will turn on before others causing thermal run-away followed by a cascade of failures. The lesson is: If you intend to use a MOSFET in a linear application, make certain the part is qualified specifically for linear operation!

    IXYS Corporation used to specialize in the production of linear power semiconductor MOS (metal–oxide–silicon) transistors and power bipolar junction transistors (BJTs). IXYS used to have a nice library of Application Notes on running MOSFETs in linear mode. But it seems IXYS was bought-out by Littlefuse. Try searching their site instead:

    Or maybe here:

    1. Performance in linearmode of parallel MOSFETs is an issue but there is normally no higher risk of thermal runaway as a failure mode.
      Heat is reducing carrier mobility and by that reduces drive current and that goes squared into powerdisipation. Therefore, parallel MOSFETs are mainly ballancing each other out as the colder one carries more of the current. Examples are PC mainboard multi-phase low-voltage, high-current rails with 3 or more parallel MOSFETs per phase.
      BJTs on the other hand face thermal runaway in parallel configurations as do some IGBTs.

      1. Correct, it is parallel bjt that has the thermal runaway issue, especially so unmatched (hence the need for ballast resistance).
        Mosfets (as switchers) suffer from gate punch through if not careful (one of the motivations for igbt I gather), also one needs to be mindful of the body diode when Vr occurs and until Ir is effectively 0 A (damn intrinsic capacitance).

  3. For me still not clear.. I have connected pin of MCU to gate of MOSFET. Is there any scenario when pin will be damaged because of I don’t use resistor between pin and gate (very big displacement current can be)?

    1. The MCU won’t be damaged by driving the gate of the MOSFET, but potentially if there is a very large votlage spike on the drain of the FET, it could couple from drain to gate into the MCU and damage it.

    2. Yes, depending on the size of the mosfet it can damage the pin
      High current mosfets can pull as much as a couple amps on the gate right while switching. (And you want to give them that much so they can switch fast. Use a gate driver chip if you’re pwm-ing the gate; if it’s just a power switch, then a gate resistor to limit the gate current can be sufficient.)

      For a small logic mosfet, it’s not a problem.

    1. Igbts are bipolar transistors rather than mosfets. Their losses function as a voltage drop, rather than an on state resistance. As such, they are more efficient at higher voltages / lower currents, while mosfets are superior at lower voltages / higher currents

    2. The primary reason is that IGBTs are more efficient in these applications. More efficient means more power for same design size or smaller size for equivalent power.

      IGBT losses are linear: Vdrop * Current through IGBT.

      MOSFET conduction losses are exponential: Current through MOSFET * Current through MOSFET * rdsON.

      The higher the voltage, in general, the larger the gate charge of the MOSFET. The larger the gate charge of the MOSFET, the more current it takes to rapidly switch the MOSFET out of its linear region.

      The lower the voltage, in general, the smaller the gate charge of the MOSFET. The smaller gate charge allows rapid switching of the MOSFET and in such applications the MOSFET will out perform IGBTs. MOSFETS are also capable of being switched at significantly higher frequency than the IGBT.

      “Simply switching faster is not a solution, as driving the gate incurs its own losses, leaving the circuit designer to carefully balance the properties of the MOSFET.”

      That is not correct, all engineering solutions are trade offs so switching faster IS a solution.

      The MOSFET has a gate charge parameter presented as a capacitance from gate to source and a miller-effect voltage dependent capacitance from gate to drain. If you want to NOT operate the MOSFET in its linear region you fill and drain that gate charge faster. To do that you must source and sink the current into those capacitances at a faster rate.

      iC = C * dV/dT. Or, Current into a capacitance is = to the capacitance * instantaneous voltage applied across it / time interval. If you want to switch faster you are seeking to reduce the dT in that equation. Rearranged you get dT = C * dV / iC. So to make dT smaller you need to either make C smaller by buying a MOSFET with a smaller gate charge, or apply a higher voltage to the gate drive or supply / sink more current to the MOSFET’s gate capacitance. This is why gate driver ICs exist, they can source / sink 250mA, 500mA, 1A etc. to fill / drain that MOSFET gate charge very rapidly reducing the time the MOSFET spends in its linear region.

      The above is why you have a limit to the frequency that you can use a particular MOSFET. The MOSFET’s gate charge (capacitance) is essentially fixed. The voltage you drive the gate is usually fixed. The current drive is usually limited, so it’s fixed. This means that in a specific circuit the MOSFET’s dT or time to switch on / off is fixed. The ratio of the time where the MOSFET is in its linear region to when it is fully conducting gets smaller as the switching frequency increases. That causes an increase in MOSFET losses and power dissipation.

      Above another poster is driving a MOSFET directly from a microcontroller pin. This is usually not a good idea as it is the same as driving a capacitor directly from a microcontroller pin. Most micros can sink / source maybe 0.02A from their GPIOs. Plug that into the above dT = C*dV/iC equation to see how much time your are putting the MOSFET into its linear region. Additionally, and this is probably more important, you have PCB traces that go from the most local capacitor of the MCU VCC supply, through the MCU’s GPIO to the MOSFET gate pin, then from the MOSFET source to ground. All of that means you have inductance. You now have a current source / sink step function driving an LC tank circuit comprised of that PCB inductance and the gate charge of the MOSFET. Look at it on a scope to watch the ringing when you turn the MOSFET on and off. You can calculate the inductance by using the ResonantFreq = 1/2*pi*(sqrt(L * C)). Plug in the MOSFET gate charge in farads for C.

      You can measure the frequency on a scope, then rearrange the equation to solve for L. Adding a series resistor between the micro’s pin and the MOSFET gate does 2 things: 1) Reduces maximum current from microcontroller into MOSFET gate. This slows down the switching of the MOSFET. This is desirable to reduce the amount of radio frequency interference you generate. 2) This dampens the resonance between the parasitic pcb trace inductance and MOSFET gate charge. Some low power MOSFETs have a significant built in gate resistance already so an additional resistor may not be needed, it depends on the PCB layout and application.

      The reason GaN MOSFETs are exciting is their extremely low gate charge. This means they can be operated much faster / have lower losses.

  4. Because IGBTs basically have a PNP driven by a MOSFET, and the PNP can carry more current than a MOSFET of similar area (== cost). In HV applications (e.g. > 600 V), the minimum ‘diode drop’ across the PNP is insignificant to any resistive I*R drops. In LV applications, the ~ 0.7 initial drop would be too significant.

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