Two New Dev Boards That Won’t Make Your Wallet Hurt-So-Good

June 13, 2015 by Sonya Vasquez 48 Comments

If you’ve been keeping up with the hobbyist FPGA community, you’ll recognize the DE0 Nano as “that small form-factor FPGA” with a deep history of projects from Oldland cpu cores to synthesizable Parallax Propeller processors. After more than four years in the field though, it’s about time for a reboot.

Its successor, the DE0 Nano SoC, is a complete redesign from multiples perspectives while doing it’s best to preserve the bite-size form factor and price that made the first model so appealing. First, the dev board boasts a Cyclone V with 40,000 logical elements (up from the DE0’s 22K) and an integrated dual-core Arm Cortex A9 Processor. The PCB layout also brings us 3.3V Arduino shield compatibility via female headers, 1 Gig of external DDR3 SDRAM and gigabit ethernet support via two onboard ASICs to handle the protocol. The folks at Terasic also seem to be tipping their hats towards the “Duino-Pi” hobbyist community, given that they’ve kindly provided both Linux and Arduino images to get you started a few steps above your classic finite-state machines and everyday combinational logic.

And while the new SoC model sports a slightly larger form factor at 68.59mm x 96mm (as opposed to the original’s 49mm x 75.2mm), we’d say it’s a small price to pay in footprint for a whirlwind of new possibilities on the logic level. The board hits online shelves now at a respectable $100.

Next, as a heads-up, the aforementioned Arduino Zero finally makes it’s release on June 15. If you’ve ever considered taking the leap from an 8-bit to a 32-bit processor without having to hassle through the setup of an ARM toolchain, now might be a great time to get started.

via [the Arduino Blog]

The Oldland CPU 32-bit FPGA Core

March 20, 2015 by Eric Evenchick 5 Comments

Field Programmable Gate Arrays (FPGAs) let you program any logic you’d like onto a chip. You write your logic using a hardware description language, then flash it to the FPGA. You can even design your own processor and flash it to the chip.

That’s exactly what [jamieiles] has done with the Oldland CPU. It’s an open source 32 bit CPU core that you can synthesize for use on an FPGA. Not only can you browse through all the Verilog code in the Github repo, but there’s also a bunch of tools for working with this CPU core.

Included with the package is oldland-rtlsim, which lets you simulate the processor on a PC. The oldland-debug tool lets you connect to the processor for programming and debugging over JTAG. Finally, there’s a GNU toolchain port that lets you build C code for the device.

Going one step futher, [jamieiles] built a full SoC around the Oldland core. This has SPI, UART, timers, and more features you’d expect to find in a microcontroller. It can be flashed to the relatively cheap Terasic DE0-Nano board.

[jamieiles] has also ported u-boot to the processor, and the next thing on the list is the Linux kernel. If you’ve ever been interested in how CPUs actually work, this is a neat project to look through. If you want more open source CPU cores, check out OpenCores.

Running The Linux Kernel On A DE0-nano FPGA Board

September 27, 2011 by Mike Szczys 23 Comments

[Mike] has been filling up a rather intense wiki entry outlining how to run uClinux on a DE0-nano FPGA board. This is an inexpensive dev board that will run you somewhere between $80 and $100. Right off the bat he goes into a hefty list of the reasons that this is a foolish activity. To name a few: Once you’ve complete the build the device will be tethered for reboot. This board doesn’t have Ethernet hardware and TCP/IP is one of the beast features of the uClinux kernel. And the FPGA tools are closed-source, which doesn’t often mesh with the ideals of Linux developers. But we still like to see what it really takes to get these large-scope firmware builds to compile and load correctly.

After his preamble you’ll find three main chunks. The first deals with setting up the toolchain on Fedora 14. From there, he installs packages necessary for cross-compiling, pulls down the source packages, and gets to work. Once the kernel is compiled and running on the FPGA [Mike] goes on to show you how to build out a simple hardware add-on in the form of a couple of LEDs connected to extra FPGA pins. The final portion of the wiki details rolling support for toggling the LEDs into the software distribution.