DE10

2 Articles

MiSTER Multisystem 2 on a wooden table

MiSTer For Mortals: Meet The Multisystem 2

May 19, 2025 by 19 Comments

If you’ve ever squinted at a DE10-Nano wondering where the fun part begins, you’re not alone. This review of the Mr. MultiSystem 2 by [Lee] lifts the veil on a surprisingly noob-friendly FPGA console that finally gets the MiSTer experience out of the tinker cave and into the living room. Developed by Heber, the same UK wizards behind the original MultiSystem, this follow-up console dares to blend flexibility with simplicity. No stack required.

It comes in two varieties, to be precise: with, or without analog ports. The analog edition features a 10-layer PCB with both HDMI and native RGB out, Meanwell PSU support, internal USB headers, and even space for an OLED or NFC reader. The latter can be used to “load” physical cards cartridge-style, which is just ridiculously charming. Even the 3D-printed enclosure is open-source and customisable – drill it, print it, or just colour it neon green. And for once, you don’t need to be a soldering wizard to use the thing. The FPGA is integrated in the mainboard. No RAM modules, no USB hub spaghetti. Just add some ROMs (legally, of course), and you’re off.

Despite its plug-and-play aspirations, there are some quirks – for example, the usual display inconsistencies and that eternal jungle of controller mappings. But hey, if that’s the price for versatility, it’s one you’d gladly pay. And if you ever get stuck, the MiSTer crowd will eat your question and spit out 12 solutions. It remains 100% compatible with the MiSTer software, but allows some additional future features, should developers wish to support them.

Want to learn more? This could be your entrance to the MiSTer scene without having to first earn a master’s in embedded systems. Will this become an alternative to the Taki Udon announced Playstation inspired all-in-one FPGA console? Check the video here and let us know in the comments. Continue reading “MiSTer For Mortals: Meet The Multisystem 2” →

Vector Network Analyzer Uses SoC FPGA

May 9, 2018 by 15 Comments

If you are working with AC circuits a vector network analyzer (VNA) is quite handy. As an entry to the InnovateFPGA competition for students, [Evgenii Vostrikov], [Danila Nikiforovskii], and [Daniil Smirnov] created a VNA using a DE10-Nano, high-speed analog to digital and digital to analog converters, and a circulator. Most of the details are in the video below, and on the project’s GitHub page.

The DE10-Nano has a dual-core ARM processor and an Altera FPGA in one package. That allows you to use the CPUs where that makes sense and still leverage the FPGA where you need high performance.

The circulator uses an op-amp to allow the test signal to route to the device under test, while steering any reflected signal back to the device for measurement. The design also uses a lock-in amplifier, something we’ve talked about a few times recently. This allows less expensive converters to generate magnitude and phase information.

Judging by the fan in the video, we suspect the setup gets a little toasty. The GitHub page has a lot of Russian on it, so we aren’t sure how much we could puzzle out since our Russian skills were mostly from watching the Adventures of Moose and Squirrel.

If you are interested in a VNA, they aren’t as expensive as they used to be. Particularly, if you roll your own and already have some things in your junk box.

Continue reading “Vector Network Analyzer Uses SoC FPGA” →