Recovering Data For A Homemade Cray

September 8, 2011 by Brian Benchoff 41 Comments

In our hubris, we pat ourselves on the back when we’re able to pull data off our old SCSI drives. [Chris Fenton]’s attempt to get an OS for a homebrew Cray-1 puts us rightfully to shame.

Last year we saw [Chris]’ fully functional 1/10th scale Cray-1 supercomputer built around FPGA. While the reproduction was nearly cycle-accurate, [Chris] hasn’t had an opportunity to test out his system because of the lack of available Cray software. A former Cray employee heard of his plight and loaned an 80 Megabyte CDC 9877 disk pack to in the hope of getting some system software.

[Chris] acquired a monstrous 100 pound disk drive to read the disk pack, but after 30 years in storage a lot of electrical problems cropped up. Since reading the drive digitally proved to be an exercise in futility, [Chris] hit upon the idea of taking analog data straight from the read head. This left him with a magnetic image of the disk pack that was ready for some data analysis.

After the disk image was put up on the Internet, the very talented [Yngve AAdlandsvik] figured out the data, header, and error correction formats and sent [Chris] a Python script to tease bits from the analog image. While no one is quite sure what is on the disk pack provided by the Cray employee, [Chris] is remarkably close to bringing the Cray-1 OS back from the dead. There’s also a great research report [Chris] wrote as penance for access to the CDC disk drive. Any Hack A Day readers feel like looking over the data and possibly giving [Chris] a hand?

Tiny Cray-1 Courtesy Of An FPGA

September 29, 2010 by Mike Szczys 21 Comments

[Chris Fenton] spent a year and a half constructing a 1/10th scale Cray-1 reproduction. The famous supercomputer was meticulously modelled in a field programmable gate array for a “nearly cycle-accurate” reproduction. [Chris’] hardware of choice for the project is a Xilinx Spartan-3E 1600 development board, using 75-80% of the available resources. The finished product runs at 33 MHz and is missing a few functions but it sounds like they don’t affect code execution. We like that he didn’t stop with the processor implementation, but also took the time to produce a case for the development board that looks just like the original.

Unlike the Atari 2600 FPGA project, we’re not quite sure what we’d use this for. But that doesn’t diminish the excellence of his work.

Atari 2600 Recreated In An FPGA

September 15, 2010 by Mike Szczys 16 Comments

Behold [Retromaster’s] field programmable gate array implementation of an Atari 2600. The processor and video chip have both been built in the 100,000 gate Spartan-3E FPGA, with connectors for audio, video, and a Sega controller. The output signals are generated using two DACs made from R-2R resistor ladders, much like the project we saw in August. [Retromaster] included functionality for the system switches (difficulty and select) in the controller itself. There is VHDL code and board details available if you want to make one of your own. To help in making that decision we’ve embedded video of it after the break. Continue reading “Atari 2600 Recreated In An FPGA” →