Back in the day where the microprocessor was our standard building block, we tended to concentrate on computation and processing of data and not so much on I/O. Simply put there were a lot of things we had to get working just so we could then read the state of an I/O port or a counter.
Nowadays the microcontroller has taken care of most of the system level needs with the luxury of built in RAM memory and the ability to upload our code. That leaves us able to concentrate on the major role of a microcontroller: to interpret something about the environment, make decisions, and often output the result to energize a motor, LED, or some other twiddly bits.
Often the usefulness of a small microcontroller project depends on being able to interpret external signals in the form of voltage or less often, current. For example the output of a photocell, or a temperature sensor may use an analog voltage to indicate brightness or the temperature. Enter the Analog to Digital Converter (ADC) with the ability to convert an external signal to a processor readable value.
Converting analog to a digital format involves tradeoffs: how often you need to be updated as to the signal (sample rate), how much you need to know (resolution), and the cost (how much you have in your pocket). High resolution and high speed tends have higher cost.
The act of converting an analog value to a digital representation is somewhat error prone, and the tradeoffs deal with just how much error we can tolerate. Looking at the two diagrams below we see a 3 bit digital representation of a sine wave. The area between the blue digital “steps” and the red line indicates an amount of distortion of the original signal. Using more steps, or digital values and bits, we can reduce the distortion and our digital copy gets closer to faithfully representing the true signal.
Also important is the sampling rate, or how often we convert the analog signal to its digital counterpart. Just as too few voltage “steps” (resolution) results in distortion, too few steps in time (sample rate) also results in distortion. In this diagram the distance between the green and yellow lines represents time-based distortion as shown in red.
Types of ADC’s
Looking at the chart below we see four of the most common ADC technologies and their capabilities. I could probably spend an entire video post talking about Delta Sigma as it combined digital and analog processing, here I will concentrate the other three: Flash, Successive Approximation and Dual-Slope.
Flash Type Converter
The Flash converter is the fastest, hence the name, but with some inherent limits to resolution and not without some cost involved. A flash converter is a collection of high speed comparators each with a slightly different voltage reference that they are comparing the signal to.
For 8 bits of resolution, a total of 256 comparators are needed along with the supporting number of semi-precision resistors. Likewise a 10 bit converter needs 1024 comparators and herein lies the reason why flash converters, as high speed as they are, are somewhat limited in resolution due to the problems with scaling as the number of bits increase.
Also shown is a discreet signal to binary encoder known as a priority encoder. This logic creates a binary value representing the highest comparator active (think of it as the opposite of a decoder such as those used to create 8 chip selects from 3 address lines).
Successive Approximation Register (SAR)
SAR utilizes a built-in Digital to Analog Converter (DAC), the opposite of an ADC, and compares the input signal to the output of the DAC and makes adjustments until it closely approximates the input signal.
The SAR starts by first taking the MSB of the DAC value and setting it, representing 1/2 of full range, and then testing whether the input is greater or less than that value. The SAR then sets the bit if it was greater, and then tests the next bit representing 1/4 of the total. The SAR walks the bit on down testing for 1/8, 1/16, 1/32 on down to the LSB, all the while setting a bit for when the input was greater.
This series of approximations gets more accurate as more bits are tested, effectively hunting down the best approximation for the voltage it is testing against. I show some examples using a spreadsheet to represent an 8 bit SAR.
First D7 is tested and if D7 is greater than the input (represented by red crosshatch) a zero is recorded, otherwise a 1 is stored and D6 is tested (while remembering the state of D7). The conversion uses one cycle for each bit, so the SAR conversion shown takes 8 cycles each time (vs. a single acquisition time for flash).
I walk through this in the video but if you want a chance to work through this hands-on you can download the SAR Calculation Spreadsheet.
I have built an SAR system using an FPGA to provide the control logic, our R-2R Ladder that we built in the DDS video, and a simple comparator. Ever see a microcontroller with a 1-bit comparator and wonder why it’s there? Here is one reason; you can make an SAR with a handful or resistors on I/O ports and a 1-bit comparator.
Sample and Hold
As stated, an 8 bit SAR takes 8 cycles to complete an acquisition. During this time it is important that the voltage not change value as the series of approximations take place.
Enter the Sample and Hold (S/H) circuit. In its simplest form it captures the signal value in the form of a charge on a capacitor and then is isolated by a switch that disconnects the input. S/H circuits are available as integrated circuits that also do things like minimize the discharge of the voltage on the capacitor, known as droop, and to make sure that the switch affected the signal a minimal amount.
Dual Slope conversion is named after the fact that it integrates the input signal for a known period of time, which results in an accumulated charge equal to the input signal, while providing some low pass filtering in the process. The charge is then integrated off by applying a known reference voltage in the opposite polarity and counting clock pulses until the signal returns to zero. Between each of these measurement cycles is an auto-zero phase which helps remove effects like drifting baseline.
Dual-Slope is used in instances where higher resolution is needed and conversion time isn’t as critical. As Dual-Slope can also be low power consumption it is often found in handheld devices like Volt-Ohm Meters or in the example I show at the end, precision digital weighing instrumentation.
The output of Dual-Slope is ultimately a string of clock pulses though they may be internally converted to a binary value such as in the case of the TC7109 IC I show above. In cases where output is a string of pulses that need to be counted, a microcontroller can count them using dedicated counting circuitry or counting overflows of an external divide down counter where each overflow represents a known quantity of pulses. A trick for using an external counter to do scaling and yet get the benefit of the full resolution is to then manually pulse the counter until the very last overflow is detected. The number of manual pulses it took is used to determine how many were left in the counter after the acquisition phase.
Putting it Together
Below you can see a precision analog section I did back in 1982. Included in the design is a Dual-Slope ADC, an Instrumentation Amplifier with Zero and Gain correction (similar to Chopper-Stabilized or Zero-Drift amps) and active filters, all of which we have covered in Hackaday videos. The design is still viable however it is now possible to replace the instrumentation amplifier with a small dedicated chip and the dual-slope converters run faster with smaller capacitors, which takes some of the requirements off of the capacitor to not exhibit quite as low of leakage or dielectric absorption.
Understanding how an ADC works can be useful in understanding the results returned, or whether a different technology should ultimately be used. These days with SPI and I2C interfaces available on a wide array of ADC’s they can be connected to almost any processor architecture with minimal need to consider data bus architecture and timing.