A long time before Beowulf clusters wired up with commodity Ethernet hardware became a hobbyist thing and a running joke, the transputer took a swing at a very similar architecture. This used stand-alone computers that were networked together with other transputer systems, to achieve task-level parallelism. For some people like [Lance Harvie] this is the kind of hardware that he used during his university years for a project, with him not only still having that hardware, but also recently adding to this collection with a recent eBay purchase.
The transputer story is a fascinating one, forming a major part of the UK’s semiconductor industry during the 1980s, creating a strong legacy as the computer industry awkwardly tried to figure out what types of parallelism to target. Whereas the industry largely moved to instruction-level (superscalar) parallelism alongside tightly coupled task-level parallelism along with multiple CPU cores on a single die, one could consider today’s supercomputer clusters to be one example of the transputer legacy.
[Lance]’s university-era board features the T400, which he shows off while recalling programming it in the Occam language. He’s currently looking for an ISA-to-USB adapter to be able to use it again with a modern PC. While searching around, he came across an EBay listing for a four-processor board, containing four T425s. These are significantly more powerful and also can use external memory, unlike the T400.
This four-CPU board omits the external serial links, as it’s meant to be used in e.g. a scientific instrument as a stand-alone 4-unit transputer system, with all of the available four serial links per processor connected on the PCB. Even more interesting is that the processors on this board were manufactured in 1999 by ST, which was many years after transputers stopped being developed.
As [Lance] explains, this was due to the UK government pulling the plug on the transputer project, with the IP subsequently ending up at ST who kept producing the chips until 1999 at its Philippines plant.
In time, [Lance] hopes to power up all these boards and use them again in combination with a modern-day Linux-based computer. We’re definitely looking forward to seeing that happen.
Although you can definitely use any random MCU these days as your very own transputer module or link chip, with e.g. SPI making for an attractive alternative for the high-speed serial links, there’s always something to be said for using real, original hardware.
We used such boards heavily to develop SONAR systems. I seem to remember having a T8 board with 8 processors once, but I haven’t seen it for a while. Must look for it at some point….
Unfortunately we had to piviot to TI DSPs when the T9000 was clearly never going to work. In theory it looked the bees knees, but the early silicon never worked.
In a way it was a dead end, but also ahead of its time. The scalability of the parallel functionality was great, but at the time we had not reached the limit of single processor capability. For example our software aws written on 486 based PC’s which were considered state of the art.
However the ability to hook multiple building blocks of processors, generate software that worked the same on 1,4,8,N processors (apart from performance) made parallel processing very intuitive. I would love to see somrthiing like it again, with perhaps a simpler physical interface where adding a proceoor would be as simple as clicking them together, recompiling your software for the number of processors and away you go.
It would also nice to see a language like Erlang on it since it was designed for higly parallel systems. In some ways OCCAM was similar but never had the library support to be anything more than a test language
I worked on a transputer sonar system 1995-1998 in Bath: Submetrix ISIS.
We (Akebia/Primary Image) built arrays of mixed T4xx and T8xx of up to 90 or so processors for image processing and graphics work, from the mid 1980s, and I loved occam II, but it was quite a limiting language, with no data structures other than arrays.
The Lego-like ability to put together different configurations was fun too.
Also used T425 as single, embedded processors in CCTV equipment into the mid-90s, but by then were using Parallel C.
The T9000 was indeed an exciting prospect, but never got beyond engineering samples – I don’t think we ghad more than about four working at any one time, and the wormhole router chip was a disaster.
I could have filled up bathtubs while drooling at those unreachable for me Transmeta boards and chips. Never had a chance to play with them.
I could swear that back in the ’90s Transmeta was calling their products “transputers” but I can’t find any current mention of “Transmeta” and “transputer” in the same sentence.
i have that first Transputer board that has a full ISA interface and then a version that only gets power through the ISA board but communicates digitally only through the Transputer links. I got it working back in 2003 and then just put it away. Figuring out what a Transputer was using InfoSeek was my eye-opening introduction to the power of the Web after dumpster diving these boards at a college back in 1994.
One minor quibble with the narrator is that the first board, the ISA one with the T-400, also has external RAM on it (it looks like a megabyte). You can see it stacked up as eight DRAM chips on the left side.
There was only ever one transputer that did not support external memory and it was never sold. They were a batch with a bonding issue. However instead of being thrown away the famous B042 boards were made – VME form factor boards that took 6 x 7 transputers just grid interconnected via the links because some programs such as Mandelbrot and Ray Tracing could be fitted into internal memory.
BTW – I wrote the application note on the external memory interface,
Back in the days before we all started carrying smartphones and most of the ‘normies’ traded their desktops for wireless tablets I dreamed of parallelism. I wanted a desktop in every room with the newest and fastest wherever I would use it the most then they would get hand-me-downed to other rooms from there. The idea was that with lots of old pcs in the mix, when you sat down at one as soon as you asked it to do more than it could do by itself quickly it would offload tasks to other machines throughout the house. Add to that the ability to boot quickly and to do so on-demand so I wouldn’t have to leave them all turned on all the time. Plus also the ability to quickly recover and reconstitute a process elsewhere if a node got turned off while it was doing something.
I played a bit with Beowulf with two very unbalanced machines but even when I started a bunch of tasks at the slower, older one I never saw anything migrate unless I manually told it to.
To this day I am a bit sad something like this never really took off. But with today’s mix of ARM, x86 and maybe RISC-V, devices all wireless and coming and going so frequently.. I’m not sure it will ever really be practical again.
Sounds kind of like a dining philosopher problem.
Reminds me of the Sun Ray (see https://en.wikipedia.org/wiki/Sun_Ray )
Put one of these in each room, to a server somewhere running the actual processes. The idea is you could jump from place to place and have your desktop and application and data stay static.
The reality was, like so many Sun ideas, it was a solution in search of a problem. Even Oracle didn’t know what to do with them, tried deploying them internally to use up existing stock, and discovered that a traditional laptop is far more sensible in, you know, every way.
Source: Me, (happily) ex-Oracleite.
I love good ol’ PC and AT bus! 😃
Hopefully it will come back one day!
Back when I first started as an engineer in the late 80’s there were quite a few companies trying to figure out how to make processor arrays work.
I stated at Martin Marietta and we had a project called GAPP, grid array parallel processor, that used a large array of very simple (1 bit) processors for digital image processing.
The idea was (ideally) that each processor would have it’s own pixel, or in practice a small square of maybe 9 or 16 pixels. An image would be loaded into the array and all the thousands of processors would execute the same instructions in lockstep across the image at once.
It was a great idea, the actual processing was blindingly fast, even on 1989-era ASICs. But the overhead of loading an image onto the array (which couldn’t start it’s work till the last pixel arrived), and constantly having to pass adjacent pixels back and forth between processors meant that we never got it to work out in practical scales.
Martin tried to sell it commercially, but we never got any takers, especially once CMOS processes matured and clock cycles for conventional chips climbed out of the very low 10’s of MHz band. Like many parallel processing efforts of ye early days, GAPP is just another obscure footnote with about 3 Google hits.
That’s both the exciting and frustrating part of being on the bleeding edge of technology. Never know whether your project will become legendary or quietly fade away until it gets maybe dug up decades later by an enterprising YouTube or so :)
If he has a TPM module (or pins for it) he could abuse those to get an isa port working on modern hardware.
but first he will have to file a TPS report!