Breadboard Friendly FPGAs

Regular Hackaday readers will be familiar with all the cool things you can do with FPGAs; emulating old video game consoles, cracking encryption protocols, and DIY logic analyzers become relatively simple projects with even a modest FPGA dev board on your workbench. Many FPGA boards aren’t geared towards prototyping, though, and breadboard friendly devices are hard to come by. Here’s a pair of breadboardable FPGAs we’ve found while searching for some related hardware over the past few days

First up is the Mercury FPGA Module. Packaged in a DIP-64 format, the Mercury features a Spartan-3A FPGA with the equivalent of 200k logic gates. Elsewhere on the board is 512kB of RAM and 128kB of Flash storage. There are enough GPIO pins for nearly any project, but sadly only a 10-bit ADC – the same resolution you’d find in an AVR or PIC ‘micro.

Of course the Mercury isn’t the only breadboard-friendly FPGA dev board out there. There’s also the slightly more capable XuLA2 board powered by a Spartan-6 with 32 MB of RAM, 1MB of Flash. Unlike the Mercury, the XuLA2 can also fit in one of those ‘half-sized’ solderless breadboards.

Yes, it’s a different form factor than the commonly recommended Papilio One or the DE0. If you can suggest any other ‘beginners’ (i.e. doesn’t cost an arm and a leg) FPGA boards, leave a note in the comments and we’ll summarize them in another post.

Building A 100 MHz Frequency Counter

The great thing about building with gates is the crazy speeds you can achieve by using hardware directly (as opposed to working with simple microcontrollers). This 100 MHz frequency counter is a great example. [Michael] just finished building it using a Papilio board.

Of course we’re not talking about discreet chips here. The Papilio is an FPGA development board which means he is building with hardware gates, but that is still done by writing code. Above, the rig is measuring a 25 MHz being generated by a second FPGA board. Using the Papilio’s on board 32 MHz clock the device is capable of counting a frequency up to 100 MHz. You can see it measuring a 96.875  MHz signal in the video after the break. One interesting thing about that clip is that near the end he touches the crystal’s case with his finger and the Hertz really jump for a moment.

If the 8-digit display looks familiar that’s because [Michael] recently published a library to use it with an FPGA.

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Discrete FPGA Will Probably Win The 7400 Logic Competition

For this year’s 7400 logic competition, [Nick] decided to build an FPGA out of logic chips (Internet Archive cached version).

Perhaps a short explanation is in order to fully appreciate [Nick]’s work. The basic component of an FPGA is a slice, or cell, that performs boolean operations on its input and sends the result on its output. The core of these slices is a lookup table – basically a truth table that stores the result of every possible input combination.

One very easy way to implement a lookup table is to use a RAM or EEPROM chip. By tying the address lines of an EEPROM to the input and the data lines to the output, it’s possible to create a single slice of an FPGA very easily.

Unfortunately for [Nick], 74-series memories have long been out of production. There is another option open, though: shift registers. A shift register is basically an 8-bit memory chip with parallel inputs, so combining a shift register with an 8-input multiplexer is a very simple way to implement a 3-input, 1-output FPGA slice.

After figuring out how to tie these slices to bus lines, [Nick] needed a way to program them. Verilog or VHDL would border on insanity, so he wrote his own hardware description language. It’s certainly not as powerful or capable as the mainstream solutions to programming an FPGA, but it’s more than enough.

In the video after the break, you can see [Nick]’s overview of his very large 8-slice FPGA while he runs a combination lock and PWM program. All the code, schematics, and board layout are up on [Nick]’s git if you’d like to build your own.
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Bora Board Teaches Binary Hardware

If you’re just starting out in your quest to build really cool electronic devices, you’ll find a ton of options ready for the beginner. The Arduino makes toggling pins dead simple, and the Raspi brings the wonders of blinking a LED from the command line down from the gods and into the hands of the common man. These are all software platforms, though, and if you want to learn digital logic with hardware the best option is still a drawer full of 7400-series logic chips.

[Colin O’Flynn] hopes to change this with a beginners board for digital logic hardware design. It’s called the BORA, or Binary explORer boArd, and brings digital logic to a convenient package that is far less frustrating than a breadboard full of logic chips.

The BORA is based around a CPLD – a cousin of the FPGA-powered devices we see from time to time – that allows any student of digital logic to program the device and fill macrocells with NANDs, NORs, and ANDs.

The Xilinx device used in the BORA has about 1600 gates that can be programmed; more than enough to complete all the projects in the online lectures [Colin] has put together. You can check out the documentation for the BORA over on the official site, and the demo video after the break.

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Laptop LCD Resurrection Gets Some Clean Packaging

We love to see derivative works that take a great hack and make it even better. This LCD Laptop resurrection project is an excellent example. [Alex] took the work seen on this other FPGA LCD driver and delivered a leap forward on the final hardware packaging.

The link at the top drops you into the second page of [Alex’s] project thread. But if you go back to the beginning you’ll see the protoboard and spaghetti wiring which started off the process. Obviously if he plans to use this for a length of time it needs to be fortified or he’ll be cracking it open and grabbing a soldering iron again before long. But rather than just tidying up he ended up spinning his own circuit boards that make the screen look like it was manufactured to be used in this way.

He was able to mount the add-on board inside the LCD bezel, cutting out a space for the HDMI connector, barrel jack, trimpot, and the head of the inductor which was just a bit too large to fit inside. The trimpot allows him to adjust the LCD brightness. As far as we can tell the HDMI connector is just an easy way for him to deliver the drive signals from the Papilio board (FPGA) to the screen.

Exploring The Mandelbrot Set In Real Time

The Mandelbrot set – the fractal ‘snowman turned on its side’ seen above – has graced the covers of magazines, journals, and has even been exhibited in art galleries. An impressive feat for what is nothing more than a mathematical function, and has become something of an obsession for [Chiaki Nakajima].

Even on modern computers, generating an image of a portion of the Mandelbrot set takes a good bit of time. When [Chiaki] discovered this fractal in the mid-1980s, the computers of the day took hours to generate a single, low-resolution image. Real-time zooming and scrolling was impossible but [Chiaki] made the best of what he had on hand and built Pyxis, a Mandelbrot set generator made entirely out of TTL logic chips (Google Translate here).

The original Pyxis connected to a desktop computer via a breakout box. while a special program toggled the bits and registers inside the Pyxis to generate pictures of the Mandelbrot set a thousand times faster than the CPUs of the day could muster.

Time marches on, and the original logic chip Pyxis is can be easily surpassed by even the slowest netbooks. There is, however, another way to build a hardware Mandelbrot set generator: FPGAs.

A few years ago, [Chiaki] began work on the Pyxis2010 (translation), an FPGA-based Mandelbrot set generator able to dynamically zoom and pan around the world’s most popular fractal. Built around an Altera Cyclone III FPGA he picked up from Digikey for $600 (no, not a dev board, just a bare chip), [Chiaki] began deadbugging his circuit directly onto the pins of the hugely expensive FPGA. A man with a steady hand and no fear if there ever was one.

Instead of connecting his Mandelbrot generator to a computer and using it as a co-processor, [Chiaki] decided he wanted something more portable. He found an old Sony PSP, removed the LCD screen, and integrated it into his circuit. After a careful bit of dremeling and fabrication, [Chiaki] had a hand-held Mandelbrot generator that is able to display images of the world’s most famous fractal faster than any desktop computer.

It goes without saying this build is incredible. The technical skill to build an insanely fast Mandelbrot generator on an FPGA is astonishing, but basing it off a logic-chip based build reaches into the realm of godliness. You can check out a video of this amazing build after the break.

Props to [Ian Finder] for sending this one in.

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Storing User Data On Your FPGA

We’ve seen FPGAs used to recreate everything from classic arcade games to ancient computers, but with each of these builds a common problem arises. Once you’ve got the hardware emulated on an FPGA, you’ve also got to get the ROMs into the project as well. In a very interesting hack, [Mike] figured out that the serial Flash chip that stores the FPGA settings has a lot of space free, so why not store user data there?

[Mike] got the idea from seeing a recreation of the classic BombJack arcade game we featured last month. In that build, [Alex] needed to store 112Kb of game data stored in 16 ROM chips. Unfortunately, [Alex]’s FPGA only had space for 40Kb of data. After realizing his FPGA had a 512Kb SRAM chip, [Alex] decided to put all the sprites, sounds, and levels of BombJack in the SRAM.

Impressed with [Alex]’s build, [Mike] set to work generalizing the hack to work with other projects. [Mike] notes that only a few FPGA boards are capable of storing user data next to the  configuration bitstream; the hack is impossible on the Digilent Basys2 board, but it works wonderfully on a Papilio One 250K.

As a very cool build that makes FPGA-related builds even easier, we’ve got to tip our hat to [Mike] for writing up a great tutorial.