DS Goes Full Size – Pockets Everywhere Rally In Protest

It’s hard to believe we missed this one from a couple of years back but we’re thankful that reader [Christian] tipped us off about it. This a Nintendo DS with two tablet pc screens being used as an external display. He’s using an FPGA but not to emulate the processor. It is translating the video data from the DS board into usable signal for the larger LCD screens. In the video after the break you can see that pen input has been implemented, with the FPGA sending location data back to the DS.

[Neal], the creator, priced the project out at around $580. It’s worth a lot more considering the know-how needed to get the video scaling and pen input right using the FPGA. It won’t fit in your pocket, but it doesn’t have a case either so it’s not going anywhere anytime soon.

Continue reading “DS Goes Full Size – Pockets Everywhere Rally In Protest”

AVR8 Virtual Processor On FPGA

[Jack] wrote in to let us know about a project that creates a virtual microprocessor core based on the ATmega103 by using a Field-Programmable Gate Array. Great, we thought. Here’s another rather esoteric project like the NES on a FPGA, but what’s the motivation behind it? We asked [Jack] and he provided several scenarios where this is quite useful.

Implementing the AVR core allows code already written for the chips to be easily ported to an FPGA without a code rewrite. This way, if your needs outpaced the capabilities of the microcontroller long after the project has started, you can keep the code and move forward from that point with the added capabilities of the gate array. Having the core already implemented, you then only need to work with HDL for the parts of the project the AVR was unable to handle. He also makes the point that having an open source AVR core implementation provides a great tool for people already familiar with AVR to study when learning VHDL.

With products like the Butterfly that this project is based around, or the Maple we’ve seen in the past, programmable logic for the recreational hacker is starting to get a little easier.

NES Processor Cloned On A FPGA

nes-on-an-fpga

[Bradley] decided to tackle the challenge to recreate the original Nintendo Entertainment System’s processor in a Field Programmable Gate Array. Say what? The original NES is a Legacy System, still used but no longer manufactured. If a system breaks, it becomes more and more difficult to repair or find replacements parts as time passes. By using a programmable integrated circuit such as a CPLD or a FPGA to clone the functionality of the original hardware, legacy systems can live on long after the original hardware has given up the ghost.

It took [Bradley] about a year to fully implement the NES processor as part of his Master’s project at Bradley University. He used what was known about the processor combined with some detective work with logic probes along the way. The programming was done in VHDL and those files are available for download (click on Documentation).

With the ubiquity of NES emulators on every device known to man you probably won’t be replicating this unless you want a reason to play with a FPGA. What interests us is the hardware solution this type of work provides for obsolete hardware that still serves a useful purpose. If you’ve used a FPGA or similar device to keep an old system running, let us know about it in the comments.

Open Source Logic Analyzer

[youtube=http://www.youtube.com/watch?v=kqwtzUUPqu8]

[Jack Gasset] sends in the logic analyzer he’s been working on. The logic analyzer boasts an impressive array of features, it can sample 32 channels at 100MHz, 16 channels at 200MHz, SPI, UART, I2C and more. The analyzer’s maximum sample size is 4K for now, and it supports RLE to reduce the memory consumed. The analyzer connects to a java client on a standard PC via USB. The open source hardware based on a Xilinix FPGA can be purchased pre-assembled for $100 which makes it a direct competitor for the Salea logic analyzer we reviewed earlier this year.

BackTrack 4 Beta Released

backtrack

The Remote Exploit Development Team has just announced BackTrack 4 Beta. BackTrack is a Linux based LiveCD intended for security testing and we’ve been watching the project since the very early days. They say this new beta is both stable and usable. They’ve moved towards behaving like an actual distribution: it’s based on Debian core, they use Ubuntu software, and they’re running their own BackTrack repositories for future updates. There are a lot of new features, but the one we’re most interested in is the built in Pico card support. You can use the FPGAs to generate rainbow tables and do lookups for things like WPA, GSM, and Bluetooth cracking. BackTrack ISO and VMWare images are available here.

MBTA Drops Lawsuit Against MIT Subway Hackers

The Massachusetts Bay Transit Authority (MBTA) has dropped its federal case against three MIT researchers, “the subway hackers”. This happened in October and now the EFF brings news that the students will be working with the MBTA to improve their system. The overall goal is to raise security while keeping expenses minimal.

This whole mess started in August when a gag order was issued against the students’ presentation at Defcon. It’s a shame no one ever saw it because it covers a lot of interesting ground. A PDF of the banned slides is still online. They performed several attacks against both the subway’s fare system and physical security. Our favorites by far were using GNU Radio to sniff the RFID card’s transaction and bruteforcing Mifare Classic with an FPGA.

How-to: Programmable Logic Devices (CPLD)

Complex programmable logic devices (CPLDs) contain the building blocks for hundreds of 7400-serries logic ICs. Complete circuits can be designed on a PC and then uploaded to a CPLD for instant implementation. A microcontroller connected to a CPLD is like a microcontroller paired with a reprogrammable circuit board and a fully stocked electronics store.

At first we weren’t sure of the wide appeal and application of CPLDs in hobbyist projects, but we’ve been convinced. A custom logic device can eliminate days of reading datasheets, finding the ideal logic IC combination, and then waiting for chips to arrive. Circuit boards are simpler with CPLDs because a single chip with programmable pin placement can replace 100s of individual logic ICs. Circuit mistakes can be corrected by uploading a new design, rather than etching and stuffing a new circuit board. CPLDs are fast, with reaction times starting at 100MHz. Despite their extreme versatility, CPLDs are a mature technology with chips starting at $1.

We’ve got a home-etchable, self programming development board to get you started. Don’t worry, this board has a serial port interface for working with the CPLD, and doesn’t require a separate (usually parallel port) JTAG programmer.

Continue reading “How-to: Programmable Logic Devices (CPLD)”