What Development Board To Use? (Part Two)

We asked for responses to our last Development Board post, and you all followed through. We got comments, forum posts, and emails filled with your opinions. Like last time, there is no way we could cover every board, so here are a few more that seemed to be popular crowd choices. Feel free to keep sending us your favorite boards, we may end up featuring them at a later date!

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Falling Sand Game On An FPGA

This falling sand game runs on a field-programmable gate array. The Altera Cyclone II resides at the heart of that development board, running the game which was written in Verilog. [Skyler Schneider] modeled his project after a Java version of the game called Pyro Sand Game. He treats each pixel of the 640×480 VGA screen as its own cell, following a set of rules to change the cells around it. This is very similar to Conway’s Game of Life, except that there are different categories of cells that behave uniquely (oil, water, plant, fire, etc.) and gravity is a key factor. Of particular interest to us were the rules for each cell, and the method [Skyler] used to feed and sync the VGA output. After the break you can see his demonstration videos, which walk through all of the features including the Troll button.

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Game Boy VGA Using An FPGA

[ViDAR] was looking for a project to keep him occupied and settled on creating a VGA converter for his Game Boy. He had some difficulty finding pinouts for the LCD and CPU but working with what was known, and an oscilloscope, he found the necessary signal. Tap into just a few lines using those thin blue wires; Vsync, Hsync, clock, and two data pins. From there a development board with an Altera Cyclone II field-programmable gate array takes care of the heavy lifting. The board already has hardware for a VGA connection so it was just a matter of processing the incoming signals into the VGA standard. His demo video is embedded after the page break.

Want a dedicated solution? Check out this Game Boy video adapter inside a VHS cassette.

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J1: A Small, Fast, CPU Core For FPGA

[James Bowman] of the Willow Garage published a paper on his J1 CPU core for field-programmable gate arrays. This was originally developed and used for the Ethernet cameras on the PR2 (you know, that incredibly expensive beer delivery system?) robot. It uses a 16-bit von Neumann architecture and lacks several processor features you’d expect a CPU to have such as interrupts, multiply and divide, a condition register, and a carry flag. None-the-less, its compact at just 200 lines of Verilog and it can run at 80 MHz. [James] compares the J1 to three different FPGA CPU Cores commonly used and discusses how the system is built in his 4-page paper that has the details you’re interested in but won’t take all day to dig through.

V4Z80P: The 8-bit Laptop

[Phil] over at Retroleum has cobbled together a clean, well put together laptop based entirely around a Zilog Z80 microprocessor and a pair of Spartan II FPGAs. These FPGAs allow him to reduce the number of devices on his board, and therefore cut his production cost as well as device size. He even managed to integrate a salvaged PSOne screen. The laptop comes complete with [Phil]’s own Homebrew OS as well as a great graphical vector based demo.

Sure he’s updated the project in recent years to shrink the board, speeding up the Z80, and increasing the peripheral speed and functionality, but we’re suckers here for a total package hack. Seriously though, check out the newest version of the device as well as the backlog that shows the project growing over time.

Thanks to [Steth] for the heads up.

Tiny Cray-1 Courtesy Of An FPGA

[Chris Fenton] spent a year and a half constructing a 1/10th scale Cray-1 reproduction. The famous supercomputer was meticulously modelled in a field programmable gate array for a “nearly cycle-accurate” reproduction. [Chris’] hardware of choice for the project is a Xilinx Spartan-3E 1600 development board, using 75-80% of the available resources. The finished product runs at 33 MHz and is missing a few functions but it sounds like they don’t affect code execution. We like that he didn’t stop with the processor implementation, but also took the time to produce a case for the development board that looks just like the original.

Unlike the Atari 2600 FPGA project, we’re not quite sure what we’d use this for. But that doesn’t diminish the excellence of his work.

Atari 2600 Recreated In An FPGA

Behold [Retromaster’s] field programmable gate array implementation of an Atari 2600. The processor and video chip have both been built in the 100,000 gate Spartan-3E FPGA, with connectors for audio, video, and a Sega controller. The output signals are generated using two DACs made from R-2R resistor ladders, much like the project we saw in August. [Retromaster] included functionality for the system switches (difficulty and select) in the controller itself. There is VHDL code and board details available if you want to make one of your own. To help in making that decision we’ve embedded video of it after the break. Continue reading “Atari 2600 Recreated In An FPGA”