A Free Speed Boost For Your Pi 5

The world of the overclocker contains many arcane tweaks to squeeze the last drops of performance from a computer, many of which require expert knowledge to understand. Happily for Raspberry Pi 5 owners the Pi engineers have come up with a set of tweaks you don’t have to be an overclocker to benefit from, working on the DRAM timings to extract a healthy speed boost. Serial Pi hacker [Jeff Geerling] has tested them and thinks they should be good for as much as 20% boost on a stock board. When overclocked to 3.2 GHz, he found an unbelievable 32% increase in performance.

We’re not DRAM experts here at Hackaday, but as we understand it they have been using timings from the Micron data sheets designed to play it safe. In consultation with Micron engineers they were able to use settings designed to be much faster, we gather by monitoring RAM temperature to ensure the chips stay within their parameters. Best of all, there’s no need to get down and dirty with the settings, and they can be available to all with a firmware update. It’s claimed this will help Pi 4 owners to some extent as well as those with a Pi 5, so even slightly older boards get some love. So if you have a Pi 5, don’t wait for the Pi 6, upgrade today, for free!

Gloriously Impractical: Overclocking The Raspberry Pi 5 To 3.6 GHz

The Raspberry Pi 5 board strapped to a liquid nitrogen cooler and with ElmorLabs AMPLE-X1 power board attached. (Credit: Pieter-Jan Plaisier, SkatterBencher.com)
The Raspberry Pi 5 board strapped to a liquid nitrogen cooler with an ElmorLabs AMPLE-X1 power board attached. (Credit: Pieter-Jan Plaisier, SkatterBencher.com)

As impractical as most overclocking of computers is these days, there is still a lot of fun to be had along the way. Case in point being [Pieter-Jan Plaisier]’s recent liquid nitrogen-aided overclocking of an unsuspecting Raspberry Pi 5 and its BCM2712 SoC. Previous OCing attempts with air cooling by [Pieter] had left things off at a paltry 3 GHz from the default 2.4 GHz, with the power management IC (PMIC) circuitry on the SBC turning out to be the main limiting factor.

The main change here was thus to go for liquid nitrogen (LN2) cooling, with a small chipset LN2 pot to fit on the SBC. Another improvement was the application of a NUMA (non-uniform memory addressing) patch to force the BCM2712’s memory controller to utilize better RAM chip parallelism.

With these changes, the OC could now hit 3.6 GHz, but at 3.7 GHz, the system would always crash. It was time to further investigate the PMIC issues.

The PMIC imposes voltage configuration limitations and turns the system off at high power consumption levels. A solution there was to replace said circuitry with an ElmorLabs AMPLE-X1 power supply and definitively void the SBC’s warranty. This involves removing inductors and removing solder mask to attach the external power wires. Yet even with these changes, the SoC frequency had trouble scaling, which is why an external clock board was used to replace the 54 MHz oscillator on the PCB. Unfortunately, this also failed to improve the final overclock.

We covered the ease of OCing to 3 GHz previously, and no doubt some of us are wondering whether the new SoC stepping may OC better. Regardless, if you want to get a faster small system without jumping through all those hoops, there are definitely better (and cheaper) options. But you do miss out on the fun of refilling the LN2 pot every couple of minutes.

Thanks to [Stephen Walters] for the tip.

New 2 GB Raspberry Pi 5 Has Smaller Die And 30% Lower Idle Power Usage

Recently Raspberry Pi released the 2GB version of the Raspberry Pi 5 with a new BCM2712 SoC featuring the D0 stepping. As expected, [Jeff Geerling] got his mitts on one of these boards and ran it through its paces, with positive results. Well, mostly positive results — as the Geekbench test took offence to the mere 2 GB of RAM on the board and consistently ran out of memory by the multi-core Photo Filter test, as feared when we originally reported on this new SBC. Although using swap is an option, this would not have made for a very realistic SoC benchmark, ergo [Jeff] resorted to using sysbench instead.

Naturally some overclocking was also performed, to truly push the SoC to its limits. This boosted the clock speed from 2.4 GHz all the way up to 3.5 GHz with the sysbench score increasing from 4155 to 6068. At 3.6 GHz the system wouldn’t boot any more, but [Jeff] figured that delidding the SoC could enable even faster speeds. This procedure also enabled taking a look at the bare D0 stepping die, revealing it to be 32.5% smaller than the previous C1 stepping on presumably the same 16 nm process.

Although 3.5 GHz turns out to be a hard limit for now, the power usage was interesting with idle power being 0.9 watts lower (at 2.4 W) for the D0 stepping and the power and temperatures under load also looked better than the C1 stepping. Even when taking the power savings of half the RAM versus the 4 GB version into account, the D0 stepping seems significantly more optimized. The main question now is when we can expect to see it appear on the 4 and 8 GB versions of the SBC, though the answer there is likely ‘when current C1 stocks run out’.

Cost-Optimized Raspberry Pi 5 Released With 2 GB RAM And D0 Stepping

When the Raspberry Pi 5 SBC was released last year, it came in 4 and 8 GB RAM variants, which currently retail from around $80 USD and €90 for the 8 GB variant to $60 and €65 for the 4 GB variant. Now Raspberry Pi has announced the launch of a third Raspberry Pi 5 variant: a 2 GB version which also features a new stepping of the BCM2712 SoC. This would sell for about $50 USD and feature the D0 stepping that purportedly strips out a lot of the ‘dark silicon’ that is not used on the SBC.

These unused die features are likely due to the Broadcom SoCs used on Raspberry Pi SBCs being effectively recycled set-top box SoCs and similar. This means that some features that make sense in a set-top box or such do not make sense for a general-purpose SBC, but still take up die space and increase the manufacturing defect rate. The D0 stepping thus would seem to be based around an optimized die, with as only possible negative being a higher power density due to a (probably) smaller die, making active cooling even more important.

As for whether 2 GB is enough for your purposes depends on your use case, but knocking $10 off the price of an RPi 5 could be worth it for some. Perhaps more interesting is that this same D0 stepping of the SoC is likely to make it to the other RAM variants as well. We’re awaiting benchmarks to see what the practical difference is between the current C1 and new D0 steppings.

Thanks to [Mark Stevens] for the tip.

A New Raspberry 5 DSI Cable Makes Using Screens Easier

Arguably the greatest strength of the Raspberry Pi is the ecosystem — it’s well-supported by its creators and the aftermarket. At the same time, the proliferation of different boards has made things more complicated over the years. Thankfully, though, the community is always standing by to help fix any problems. [Rastersoft] has stepped up in this regard, solving an issue with the Raspberry Pi 5 and DSI screen cables.

The root cause is that the DSI cable used on the Raspberry Pi 5 has changed relative to earlier boards. This means that if you use the Pi 5 with many existing screens and DSI cables, you’ll find your flat ribbon cable gets an ugly twist in it. This can be particularly problematic when using the cables in tight cases, where they may end up folded, crushed, or damaged.

[Rastersoft] got around this by designing a new cable that avoided the problem. It not only solves the twist issue, but frees up space around the CPU if you wish to use a cooler. Thanks to modern PCB houses embracing flexible boards, it’s easy to get it produced, too.

This is a great example of the democratization of PCB and electronics production in general. 20 years ago, you wouldn’t be able to make a flex cable like this without ordering 10,000 of them. Today, you can order a handful for your own personal use, and share the design with strangers on a whim. Easy, huh? It’s a beautiful world we live in.

DietPi Version 9.1: Now With Raspberry Pi 5 Support And More

DietPi recently released version 9.1, which among other changes includes new images for the Raspberry Pi 5, Radxa Rock 4 SE and NanoPi R5S/R5C & 6. The Radxa Rock 4 SE image was necessary because the Rock 4’s RK3399 SoC is subtly different from the RK3399-T’s SoC in terms of memory support, which prevents a Rock 4 image from booting on the Rock 4 SE. Meanwhile the Raspberry Pi 5 image is all new and still a bit rough around the edges, with features like the changing of the resolution and camera module support not working yet. These new images are all available for testing.

We covered DietPi previously with their 8.12 release, along with the reasons why you might want to use DietPi over Armbian and Raspberry Pi OS. Essentially DietPi’s main focus is on performance combined with a small installed size, with the included configuration tools and the setup allowing for many more features to be tweaked than you usually find. If the performance improvements, lower RAM usage and faster boot times seen with the Raspberry Pi 4 holds up, then DietPi can just give the Raspberry Pi 5 a nice little boost, while saving power in the process.

Thanks to [StephanStS] for the tip.

Raspberry Pi Changes HATs

Following on the heels of their Raspberry Pi 5 launch and some specifications for their RP1 all-in-one peripheral chip, the Raspberry Pi folks have now released an update to the HAT peripheral hardware specification reflecting the new model. Called the HAT+, it represents a major step forward with some significant changes.

Most visible will be changes to the mechanical specification, for while the original HAT specification was very rigid this new version is much looser. A HAT+ must only mate with the 40-pin connector, including the ID pins, and line up with only a single mounting hole compared to the four on the original. Electrically, a HAT+ must recognise the standby power state in which the 3.3-volt line is powered down while the 5-volt line remains active, while software-wise, there are changes to the content of the ID EEPROM including the ability to inform about stackable smaller HATs.

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