ASIC

27 Articles

An ASIC For A Secret File

March 24, 2024 by 6 Comments

Some time over a decade ago, the arrival of inexpensive PCB fabrication revolutionised the creation of custom electronics on a budget. It’s now normal for even the smallest projects we feature here to have a professional PCB, which for those of us who started by etching their own with ferric chloride is nothing short of a miracle. When it comes to the ultimate step in custom electronics of doing the same for integrated circuits though, it’s fair to say that this particular art is in its infancy. The TinyTapeout project is a collaborative effort in which multiple designers have the chance to make their own ASIC as a single tile on a chip along others, and [Bitluni] had the chance to participate. His ASIC? A secret file which could be read through his ESP32 to VGA board.

The video below the break then is both the tale of the secret file project, and that of TinyTapeout itself, which is a clever design involving an on-board microcontroller that selects the tile and manages the bus. This revision is Tiny Tapeout 3, which includes 249 tiles of contributor-generated circuitry holding a diverse array of projects.

The secret file itself is a motion GIF, compressed down until the point at which it will just fit on a tile. We’ll preserve the fun by not reveling what it us, but you probably won’t be surprised when you see it in the video.

We’ve featured TinyTapeout more then once, not least when [Matt Venn] gave a talk about it for Supercon 2022.

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Analog ASIC Design Built Using Digital Standard Cells

September 30, 2023 by 9 Comments

Tiny Tapeout is a way for students, hobbyists, and home gamers to get their own ASICs designs fabbed into real custom chips. Tiny Tapeout 3 was the third running, with designs mandated to be made up of simple digital standard cells. Only, a guy by the name of [Harald Pretl] found a way to make an analog circuit using these digital cells anyway.

In a video on YouTube, [Harald] gave an interview on how he was able to create a temperature sensor within the constraints of the Tiny Tapeout 3 requirements. The sensor has a range of -30 C to 120 C, albeit in a relatively crude resolution of 5 degrees C. The sensor works by timing the discharge of a pre-charged parasitic capacitor, with the discharge current being the subthreshold current of a MOSFET, which is highly dependent on temperature.  [Harald] goes deep into the details on how the design achieves its full functionality using the pre-defined digital cells available in the Tiny Tapeout 3 production run.

You can checkout a deeper breakdown of [Harald]’s design on the submission page. Meanwhile, Tiny Tapeout creator [Matt Venn] gave a great talk on the technology at Hackaday Supercon last year.

Continue reading “Analog ASIC Design Built Using Digital Standard Cells” →

Home Heating With Bitcoin Miners Is Now A Real Thing

May 13, 2023 by 64 Comments

If you were reading this post a month ago, you could have been forgiven for thinking it was an April Fools post. But we assure you, this is no joke. A company called HeatBit has recently opened preorders for their second generation of Bitcoin miner that doubles as a space heater.

The logic goes something like this: if you’re going to be using an electric space heater anyway, which essentially generates heat by wasting a bunch of energy with a resistive element, why not replace that element with a Bitcoin miner instead? Or at least, some of the element. The specs listed for the HeatBit Mini note that the miner itself only consumes 300 watts, which is only responsible for a fraction of the device’s total heat output. Most of the thermal work is actually done by a traditional 1000 watt heater built inside the 46 cm (18 inch) tall cylindrical device.

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Opening Up ASIC Design

April 5, 2023 by 7 Comments

The odds are that if you’ve heard about application-specific integrated circuits (ASICs) at all, it’s in the context of cryptocurrency mining. For some currencies, the only way to efficiently mine them anymore is to build computers so single-purposed they can’t do anything else. But an ASIC is a handy tool to develop for plenty of embedded applications where efficiency is a key design goal. Building integrated circuits isn’t particularly straightforward or open, though, so you’ll need some tools to develop them such as OpenRAM.

Designing the working memory of a purpose-built computing system is a surprisingly complex task which OpenRAM seeks to demystify a bit. Built in Python, it can help a designer handle routing models, power modeling, timing, and plenty of other considerations when building static RAM modules within integrated circuits. Other tools for taking care of this step of IC design are proprietary, so this is one step on the way to a completely open toolchain that anyone can use to start building their own ASIC.

This tool is relatively new and while we mentioned it briefly in an article back in February, it’s worth taking a look at for anyone who needs more than something like an FPGA might offer and who also wants to use an open-source tool. Be sure to take a look at the project’s GitHub page for more detailed information as well. There are open-source toolchains if you plan on sticking with your FPGA of choice, though.

Tiny Tapeout 3

Tiny Tapeout 3: Get Your Own Chip Design To A Fab

March 5, 2023 by 12 Comments

Custom semiconductor chips are generally big projects made by big companies with big budgets. Thanks to Tiny Tapeout, students, hobbyists, or anyone else can quickly get their designs onto an actual fabricated chip. [Matt Venn] has announced the opening of a third round of the Tiny Tapeout project for March 2023.

In 2022, Tiny Tapeout 1 piloted fabrication of user designs onto custom chips referred to as application-specific integrated circuits or ASICs. Following success of the pilot round, Tiny Tapeout 2 became the first paid version delivering guaranteed silicon. For Tiny Tapeout 2, there were 165 submissions. Most submissions were designed using a hardware description language such as Verilog or Amaranth, but ASICs can also be designed in the visual schematic capture tool Wokwi.

Each submitted design must fit within 150 by 170 microns. That footprint can accommodate around one thousand standard cells, which is certainly enough to explore a digital system of real interest.  Examples from Tiny Tapeout 2 include digital neurons, FPGAs, and RISC-V processor cores.

Once the 250 designs are submitted, they’ll be combined into a large grid along with a controller. The controller will receive input signals and pump the inputs via a scan chain through the entire grid to each design. The results from each design continue through the scan chain to be output from the grid. Since all 250 designs will be combined on to one chip, each designer will receive everybody else’s design along with their own. This shared process opens a huge opportunity for experimentation.

To get started on your own ASIC design right away, visit Tiny Tapeout. Also check out the talk [Matt] gave at Supercon 2022: Bringing Chip Design to the Masses along with his Zero to ASIC videos. And we’re not saying anything official, but he’ll probably be giving a workshop at Hackaday Berlin.

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Matt Venn speaking at Supercon 2022

Supercon 2022: Matt Venn’s Tiny Tapeout Brings Chip Design To The Masses

February 14, 2023 by 22 Comments

Not that long ago, rolling your own printed circuit boards was difficult, time-consuming and expensive. But thanks to an army of cheap, online manufacturing services as well as high-quality free design software, any hobbyist can now make boards to rival those made by pros. A similar shift might be underway when it comes to chip design: affordable manufacturing options and a set of free software tools are slowly bringing custom chips into the realm of hackers and hobbyists. One of those working hard to democratize chip design is Matt Venn, who’s been telling us all about his current big project, called Tiny Tapeout, in his talk at Remoticon 2022.

Matt’s quest to bring IC design to the masses started in 2020, when the first open-source compatible Process Design Kit (PDK) was released to the public. A PDK is a collection of files, normally only available under strict non-disclosure agreements, that describe all the features of a specific chip manufacturing process and enable you to make a design. With this free PDK in hand and a rag-tag collection of free software tools, Matt set out to design his first chip, a VGA clock, which he taped out (released to manufacturing) in July 2020. Continue reading “Supercon 2022: Matt Venn’s Tiny Tapeout Brings Chip Design To The Masses” →

It’s Not Easy Counting Transistors In The 8086 Processor

January 16, 2023 by 15 Comments

For any given processor it’s generally easy to find a statistic on the number of transistors used to construct it, with the famous Intel 8086 CPU generally said to contain 29,000 transistors. This is where [Ken Shirriff] ran into an issue when he sat down one day and started counting individual transistors in die shots of this processor. To his dismay, he came to a total of 19,618, meaning that 9,382 transistors are somehow unaccounted for. What is going on here?

The first point here is that the given number includes so-called ‘potential transistors’. Within a section of read-only memory (ROM), a ‘0’ would be a missing transistor, but depending on the programming of the mask ROM (e.g. for microcode as with a CISC x86 CPU), there can  be a transistor there. When adding up the potential but vacant transistor locations in ROM and PLA (programmable logic array) sections, the final count came to 29,277 potential transistors. This is much closer to the no doubt nicely rounded number of 29,000 that is generally used.

[Ken] also notes that further complications here are features such as driver transistors that are commonly found near bond wire pads. In order to increase the current that can be provided or sunk by a pad, multiple transistors can be grouped together to form a singular driver as in the above image. Meanwhile yet other transistors are used as (input protection) diodes or even resistors. All of which makes the transistor count along with the process node used useful primarily as indication for the physical size and complexity of a processor.