Tiny Tapeout 4: A PWM Clone Of Covox Speech Thing

June 21, 2024 by Dave Rowntree 4 Comments

Tiny Tapout is an interesting project, leveraging the power of cloud computing and collaborative purchasing to make the mysterious art of IC design more accessible for hardware hackers. [Yeo Kheng Meng] is one such hacker, and they have produced their very first custom IC for use with their retrocomputing efforts. As they lament, they left it a little late for the shuttle run submission deadline, so they came up with a very simple project with the equivalent behaviour of the Covox Speech Thing, which is just a basic R-2R ladder DAC hanging from a PC parallel port.

The computed gate-level routing of the ASIC layout

The plan was to capture an 8-bit input bus and compare it against a free-running counter. If the input value is larger than the counter, the output goes high; otherwise, it goes low. This produces a PWM waveform representing the input value. Following the digital output with an RC low-pass filter will generate an analogue representation. It’s all very simple stuff. A few details to contend with are specific to Tiny Tapout, such as taking note of the enable and global resets. These are passed down from the chip-level wrapper to indicate when your design has control of the physical IOs and is selected for operation. [Yeo] noticed that the GitHub post-synthesis simulation failed due to not taking note of the reset condition and initialising those pesky flip-flops.

After throwing the design down onto a Mimas A7 Artix 7 FPGA board for a quick test, data sent from a parallel port-connected PC popped out as a PWM waveform as expected, and some test audio could be played. Whilst it may be true that you don’t have to prototype on an FPGA, and some would argue that it’s a lot of extra effort for many cases, without a good quality graphical simulation and robust testbench, you’re practically working blind. And that’s not how working chips get made.

If you want to read into Tiny Tapeout some more, then we’ve a quick guide for that. Or, perhaps hear it direct from the team instead?

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The Z80 Is Dead. Long Live The Free Z80!

April 28, 2024 by Jenny List 27 Comments

It’s with a tinge of sadness that we and many others reported on the recent move by Zilog to end-of-life the original Z80 8-bit microprocessor. This was the part that gave so many engineers and programmers their first introduction to a computer of their own. Even though now outdated its presence has been a constant over the decades. Zilog will continue to sell a Z80 derivative in the form of their eZ80, but that’s not the only place the core can be found on silicon. [Rejunity] is bringing us an open-source z80 core on real hardware, thanks of course to the TinyTapeout ASIC project. The classic core will occupy two tiles on the upcoming TinyTapeout 7. While perhaps it’s not quite the same as a real 40-pin DIP in your hands, like all of the open-source custom silicon world, it’s as yet early days.

The core in question is derived from the TV80 open-source core, which we would be very interested to compare when fabricated at TinyTapeout’s 130nm process with an original chip from a much larger 1970s process. While It’s true that this project is more of an interesting demonstration of TinyTapeout than a practical everyday Z80, it does at least serve as a reminder that there may be a future point in which a run of open-source real Z80s or other chips might become possible.

This isn’t the first time we’ve featured a TinyTapeout project.

An ASIC For A Secret File

March 24, 2024 by Jenny List 6 Comments

Some time over a decade ago, the arrival of inexpensive PCB fabrication revolutionised the creation of custom electronics on a budget. It’s now normal for even the smallest projects we feature here to have a professional PCB, which for those of us who started by etching their own with ferric chloride is nothing short of a miracle. When it comes to the ultimate step in custom electronics of doing the same for integrated circuits though, it’s fair to say that this particular art is in its infancy. The TinyTapeout project is a collaborative effort in which multiple designers have the chance to make their own ASIC as a single tile on a chip along others, and [Bitluni] had the chance to participate. His ASIC? A secret file which could be read through his ESP32 to VGA board.

The video below the break then is both the tale of the secret file project, and that of TinyTapeout itself, which is a clever design involving an on-board microcontroller that selects the tile and manages the bus. This revision is Tiny Tapeout 3, which includes 249 tiles of contributor-generated circuitry holding a diverse array of projects.

The secret file itself is a motion GIF, compressed down until the point at which it will just fit on a tile. We’ll preserve the fun by not reveling what it us, but you probably won’t be surprised when you see it in the video.

We’ve featured TinyTapeout more then once, not least when [Matt Venn] gave a talk about it for Supercon 2022.

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Analog ASIC Design Built Using Digital Standard Cells

September 30, 2023 by Lewin Day 9 Comments

Tiny Tapeout is a way for students, hobbyists, and home gamers to get their own ASICs designs fabbed into real custom chips. Tiny Tapeout 3 was the third running, with designs mandated to be made up of simple digital standard cells. Only, a guy by the name of [Harald Pretl] found a way to make an analog circuit using these digital cells anyway.

In a video on YouTube, [Harald] gave an interview on how he was able to create a temperature sensor within the constraints of the Tiny Tapeout 3 requirements. The sensor has a range of -30 C to 120 C, albeit in a relatively crude resolution of 5 degrees C. The sensor works by timing the discharge of a pre-charged parasitic capacitor, with the discharge current being the subthreshold current of a MOSFET, which is highly dependent on temperature. [Harald] goes deep into the details on how the design achieves its full functionality using the pre-defined digital cells available in the Tiny Tapeout 3 production run.

You can checkout a deeper breakdown of [Harald]’s design on the submission page. Meanwhile, Tiny Tapeout creator [Matt Venn] gave a great talk on the technology at Hackaday Supercon last year.

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Home Heating With Bitcoin Miners Is Now A Real Thing

May 13, 2023 by Tom Nardi 64 Comments

If you were reading this post a month ago, you could have been forgiven for thinking it was an April Fools post. But we assure you, this is no joke. A company called HeatBit has recently opened preorders for their second generation of Bitcoin miner that doubles as a space heater.

The logic goes something like this: if you’re going to be using an electric space heater anyway, which essentially generates heat by wasting a bunch of energy with a resistive element, why not replace that element with a Bitcoin miner instead? Or at least, some of the element. The specs listed for the HeatBit Mini note that the miner itself only consumes 300 watts, which is only responsible for a fraction of the device’s total heat output. Most of the thermal work is actually done by a traditional 1000 watt heater built inside the 46 cm (18 inch) tall cylindrical device.

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Opening Up ASIC Design

April 5, 2023 by Bryan Cockfield 7 Comments

The odds are that if you’ve heard about application-specific integrated circuits (ASICs) at all, it’s in the context of cryptocurrency mining. For some currencies, the only way to efficiently mine them anymore is to build computers so single-purposed they can’t do anything else. But an ASIC is a handy tool to develop for plenty of embedded applications where efficiency is a key design goal. Building integrated circuits isn’t particularly straightforward or open, though, so you’ll need some tools to develop them such as OpenRAM.

Designing the working memory of a purpose-built computing system is a surprisingly complex task which OpenRAM seeks to demystify a bit. Built in Python, it can help a designer handle routing models, power modeling, timing, and plenty of other considerations when building static RAM modules within integrated circuits. Other tools for taking care of this step of IC design are proprietary, so this is one step on the way to a completely open toolchain that anyone can use to start building their own ASIC.

This tool is relatively new and while we mentioned it briefly in an article back in February, it’s worth taking a look at for anyone who needs more than something like an FPGA might offer and who also wants to use an open-source tool. Be sure to take a look at the project’s GitHub page for more detailed information as well. There are open-source toolchains if you plan on sticking with your FPGA of choice, though.

Tiny Tapeout 3: Get Your Own Chip Design To A Fab

March 5, 2023 by Joseph Long 12 Comments

Custom semiconductor chips are generally big projects made by big companies with big budgets. Thanks to Tiny Tapeout, students, hobbyists, or anyone else can quickly get their designs onto an actual fabricated chip. [Matt Venn] has announced the opening of a third round of the Tiny Tapeout project for March 2023.

In 2022, Tiny Tapeout 1 piloted fabrication of user designs onto custom chips referred to as application-specific integrated circuits or ASICs. Following success of the pilot round, Tiny Tapeout 2 became the first paid version delivering guaranteed silicon. For Tiny Tapeout 2, there were 165 submissions. Most submissions were designed using a hardware description language such as Verilog or Amaranth, but ASICs can also be designed in the visual schematic capture tool Wokwi.

Each submitted design must fit within 150 by 170 microns. That footprint can accommodate around one thousand standard cells, which is certainly enough to explore a digital system of real interest. Examples from Tiny Tapeout 2 include digital neurons, FPGAs, and RISC-V processor cores.

Once the 250 designs are submitted, they’ll be combined into a large grid along with a controller. The controller will receive input signals and pump the inputs via a scan chain through the entire grid to each design. The results from each design continue through the scan chain to be output from the grid. Since all 250 designs will be combined on to one chip, each designer will receive everybody else’s design along with their own. This shared process opens a huge opportunity for experimentation.

To get started on your own ASIC design right away, visit Tiny Tapeout. Also check out the talk [Matt] gave at Supercon 2022: Bringing Chip Design to the Masses along with his Zero to ASIC videos. And we’re not saying anything official, but he’ll probably be giving a workshop at Hackaday Berlin.

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