semiconductor

62 Articles

Two clear phials are shown in the foreground, next to a glass flask. One phial is labelled “P,” and the other is labelled “N”.

Designing A Hobbyist’s Semiconductor Dopant

May 18, 2025 by 3 Comments

[ProjectsInFlight] has been on a mission to make his own semiconductors for about a year now, and recently shared a major step toward that goal: homemade spin-on dopants. Doping semiconductors has traditionally been extremely expensive, requiring either ion-implantation equipment or specialized chemicals for thermal diffusion. [ProjectsInFlight] wanted to use thermal diffusion doping, but first had to formulate a cheaper dopant.

Thermal diffusion doping involves placing a source of dopant atoms (phosphorus or boron in this case) on top of the chip to be doped, heating the chip, and letting the dopant atoms diffuse into the silicon. [ProjectsInFlight] used spin-on glass doping, in which an even layer of precursor chemicals is spin-coated onto the chip. Upon heating, the precursors decompose to leave behind a protective film of glass containing the dopant atoms, which diffuse out of the glass and into the silicon.

After trying a few methods to create a glass layer, [ProjectsInFlight] settled on a composition based on tetraethyl orthosilicate, which we’ve seen used before to create synthetic opals. After finding this method, all he had to do was find the optimal reaction time, heating, pH, and reactant proportions. Several months of experimentation later, he had a working solution.

After some testing, he found that he could bring silicon wafers from their original light doping to heavy doping. This is particularly impressive when you consider that his dopant is about two orders of magnitude cheaper than similar commercial products.

Of course, after doping, you still need to remove the glass layer with an oxide etchant, which we’ve covered before. If you prefer working with lasers, we’ve also seen those used for doping. Continue reading “Designing A Hobbyist’s Semiconductor Dopant” →

New Bismuth Transistor Runs 40% Faster And Uses 10% Less Power

May 16, 2025 by 38 Comments

Recently in material science news from China we hear that [Hailin Peng] and his team at Peking University just made the world’s fastest transistor and it’s not made of silicon. Before we tell you about this transistor made from bismuth here’s a whirlwind tour of the history of the transistor.

The Bipolar Junction Transistor (BJT, such as NPN and PNP) was developed soon after the point-contact transistor which was developed at Bell Labs in 1947. Then after Resistor-Transistor Logic (RTL) came Transistor-Transistor Logic (TTL) made with BJTs. The problem with TTL was too much power consumption.

Continue reading “New Bismuth Transistor Runs 40% Faster And Uses 10% Less Power” →

Semiconductor Simulator Lets You Play IC Designer

May 12, 2025 by 8 Comments

For circuit simulation, we have always been enthralled with the Falstad simulator which is a simple, Spice-like simulator that runs in the browser. [Brandon] has a simulator, too, but it simulates semiconductor devices. With help from [Paul Falstad], that simulator also runs in the browser.

This simulator takes a little thinking and lets you build devices as you might on an IC die. The key is to use the drop-down that initially says “Interact” to select a tool. Then, the drop-down below lets you select what you are drawing, which can be a voltage source, metal, or various materials you find in semiconductor devices, like n-type or a dielectric.

It is a bit tricky, but if you check out the examples first (like this diode), it gets easier. The main page has many examples. You can even build up entire subsystems like a ring oscillator or a DRAM cell.

Designing at this level has its own quirks. For example, in the real world, you think of resistors as something you can use with great precision, and capacitors are often “sloppy.” On an IC substrate, resistors are often the sloppy component. While capacitor values might not be exact, it is very easy to get an extremely precise ratio of two capacitors because the plate size is tightly controlled. This leads to a different mindset than you are used to when designing with discrete components.

Of course, this is just a simulation, so everything can be perfect. If, for some reason, you don’t know about the Falstad simulator, check it out now.

Pulsed Deposition Points A Different Path To DIY Semiconductors

February 19, 2025 by 1 Comment

While not impossible, replicating the machines and processes of a modern semiconductor fab is a pretty steep climb for the home gamer. Sure, we’ve seen it done, but nanoscale photolithography is a demanding process that discourages the DIYer at every turn. So if you want to make semiconductors at home, it might be best to change the rules a little and give something like this pulsed laser deposition prototyping apparatus a try.

Rather than building up a semiconductor by depositing layers of material onto a silicon substrate and selectively etching features into them with photolithography, [Sebastián Elgueta]’s chips will be made by adding materials in their final shape, with no etching required. The heart of the process is a multi-material pulsed laser deposition chamber, which uses an Nd:YAG laser to ablate one of six materials held on a rotating turret, creating a plasma that can be deposited onto a silicon substrate. Layers can either be a single material or, with the turret rapidly switched between different targets, a mix of multiple materials. The chamber is also equipped with valves for admitting different gases, such as oxygen when insulating layers of metal oxides need to be deposited. To create features, a pattern etched into a continuous web of aluminum foil by a second laser is used as a mask. When a new mask is needed, a fresh area of the foil is rolled into position over the substrate; this keeps the patterns in perfect alignment.

We’ve noticed regular updates on this project, so it’s under active development. [Sebastián]’s most recent improvements to the setup have involved adding electronics inside the chamber, including a resistive heater to warm the substrate before deposition and a quartz crystal microbalance to measure the amount of material being deposited. We’re eager to see what else he comes up with, especially when those first chips roll off the line. Until then, we’ll just have to look back at some of [Sam Zeloof]’s DIY semiconductors.

Growing A Gallium-Arsenide Laser Directly On Silicon

February 7, 2025 by 10 Comments

As great as silicon is for semiconductor applications, it has one weakness in that using it for lasers isn’t very practical. Never say never though, as it turns out that you can now grow lasers directly on the silicon material. The most optimal material for solid-state lasers in photonics is gallium-arsenide (GaAs), but due to the misalignment of the crystal lattice between the compound (group III-V) semiconductor and silicon (IV) generally separate dies would be produced and (very carefully) aligned or grafted onto the silicon die.

Naturally, it’s far easier and cheaper if a GaAs laser can be grown directly on the silicon die, which is what researchers from IMEC now have done (preprint). Using standard processes and materials, GaAs lasers were grown on industry-standard 300 mm silicon wafers. The trick was to accept the lattice mismatch and instead focus on confining the resulting flaws through a layer of silicon dioxide on top of the wafer. In this layer trenches are created (see top image), which means that when the GaAs is deposited it only contacts the Si inside these grooves, thus limiting the effect of the mismatch and confining it to within these trenches.

There are still a few issues to resolve before this technique can be prepared for mass-production, of course. The produced lasers work at 1,020 nm, which is a shorter wavelength than typically used, and there are still some durability issues due to the manufacturing process that have to be addressed.

Schematic for progress of 3D integration. a, Schematic showing conventional 3D integration by TSV through wafers. b, M3D integration of single-crystalline Si devices by transfer, c, Growth-based M3D integration of polycrystalline devices. d, Growth-based seamless M3D integration of single-crystalline devices. (Credit: Ki Seok Kim et al., 2024, Nature)

Growing Semiconductor Layers Directly With TMDs

January 6, 2025 by 5 Comments

Transition-metal dichalcogenides (TMDs) are a class of material that’s been receiving significant attention as a possible successor of silicon. Recently, a team of researchers has demonstrated the use of TMDs as an alternative to through-silicon-vias (TSV), which is the current way that multiple layers of silicon semiconductor circuitry are stacked, as seen with, e.g., NAND Flash ICs and processors with stacked memory dice. The novelty here is that the new circuitry is grown directly on top of the existing circuitry, removing the need for approaches like TSV to turn 2D layers into 3D stacks.

As reported in the paper in Nature by [Ki Seok Kim] and colleagues (gift article), this technique of monolithic 3D (M3D) integration required overcoming a number of technological challenges, most of all enabling the new TMD single-crystals to grow at low enough temperatures that it doesn’t destroy the previously created circuitry. The progress is detailed in the paper’s schematic (pictured above): from TSV to M3D by transfer of layers and high- and low-temperature growth of single-crystal layers.

Continue reading “Growing Semiconductor Layers Directly With TMDs” →

Homebrew Electron Beam Lithography With A Scanning Electron Microscope

December 19, 2024 by 8 Comments

If you want to build semiconductors at home, it seems like the best place to start might be to find a used scanning electron microscope on eBay. At least that’s how [Peter Bosch] kicked off his electron beam lithography project, and we have to say the results are pretty impressive.

Now, most of the DIY semiconductor efforts we’ve seen start with photolithography, where a pattern is optically projected onto a substrate coated with a photopolymer resist layer so that features can be etched into the surface using various chemical treatments. [Peter]’s method is similar, but with important differences. First, for a resist he chose poly-methyl methacrylate (PMMA), also known as acrylic, dissolved in anisole, an organic substance commonly used in the fragrance industry. The resist solution was spin-coated into a test substrate of aluminized Mylar before going into the chamber of the SEM.

As for the microscope itself, that required a few special modifications of its own. Rather than rastering the beam across his sample and using a pattern mask, [Peter] wanted to draw the pattern onto the resist-covered substrate directly. This required an external deflection modification to the SEM, which we’d love to hear more about. Also, the SEM didn’t support beam blanking, meaning the electron beam would be turned on even while moving across areas that weren’t to be exposed. To get around this, [Peter] slowed down the beam’s movements while exposing areas in the pattern, and sped it up while transitioning to the next feature. It’s a pretty clever hack, and after development and etching with a cocktail of acids, the results were pretty spectacular. Check it out in the video below.

It’s pretty clear that this is all preliminary work, and that there’s much more to come before [Peter] starts etching silicon. He says he’s currently working on a thermal evaporator to deposit thin films, which we’re keen to see. We’ve seen a few sputtering rigs for thin film deposition before, but there are chemical ways to do it, too.

Continue reading “Homebrew Electron Beam Lithography With A Scanning Electron Microscope” →