Google Removes RISC-V Support From Android

May 3, 2024 by Maya Posch 20 Comments

Last year the introduction of RISC-V support to the Android-specific, Linux-derived Android Common Kernel (ACK) made it seem that before long Android devices might be using SoCs based around the RISC-V ISA, but it would seem that these hopes are now dashed. As reported by Android Authority, with a series of recently accepted patches this RISC-V support was stripped again from the ACK. While this doesn’t mean that Android cannot be made to work on RISC-V, any company interested would have to do all of the heavy lifting themselves, which might include Qualcomm with their recently announced RISC-V-based smartwatch Snapdragon SoC.

No reason was provided by Google for this change, and the official statement from Google to Android Authority says that Google is not ready to provide a single supported Android Generic Kernel Image (GKI), but that ‘Android will continue to support RISC-V’. This change however, removes RISC-V kernel support from the ACK, and since Google only certifies Android builds which ship with a GKI featuring an ACK, this effectively means that RISC-V is not supported at this point, and likely won’t be for the foreseeable future.

As discussed on Hacker News, a potential reason might be the very fragmentary nature of the RISC-V ISA, which makes a standard RISC-V kernel very complicated if you want to support more than a (barebones) profile. This is also supported by a RISC-V mailing list thread, where ‘expensive maintenance’ is mentioned for why Google doesn’t want to support RISC-V.

Programming Ada: Packages And Command Line Applications

May 1, 2024 by Maya Posch 6 Comments

In the previous installment in this series we looked at how to set up an Ada development environment, and how to compile and run a simple Ada application. Building upon this foundation, we will now look at how to create more complex applications, along with how to parse and use arguments passed to Ada applications on the command line (CLI). After all, passing flags and strings to CLI applications when we launch them is a crucial part of user interaction, as well as when automating systems as is the case with system services.

The way that a program is built-up is also essential, as well-organized code eases maintenance and promotes code reusability through e.g. modularity. In Ada you can organize subprograms (i.e. functions and procedures) in a declarative fashion as stand-alone units, as well as embed subprograms in other subprograms. Another option is packages, which roughly correspond to C++ namespaces, while tagged types are the equivalent of classes. In the previous article we already saw the use of a package, when we used the Ada.Text_IO package to output text to the CLI. In this article we’ll look at how to write our own alongside handling command line input, after a word about the role of the binding phase during the building of an Ada application.

Continue reading “Programming Ada: Packages And Command Line Applications” →

Synthesis Of Goldene: Single-Atom Layer Gold With Interesting Properties

April 25, 2024 by Maya Posch 16 Comments

The synthesis of single-atom layer versions of a range of atoms is currently all the hype, with graphene probably the most well-known example of this. These monolayers are found to have a range of mechanical (e.g. hardness), electrical (conduction) and thermal properties that are very different from the other forms of these materials. The major difficulty in creating monolayers is finding a way that works reliably and which can scale. Now researchers have found a way to make monolayers of gold – called goldene – which allows for the synthesis of relatively large sheets of this two-dimensional structure.

In the research paper by [Shun Kashiwaya] and colleagues (with accompanying press release) as published in Nature Synthesis, the synthesis method is described. Unlike graphene synthesis, this does not involve Scotch tape and a stack of graphite, but rather the wet-etching of Ti₃Cu₂ away from Ti₃AuC₂, after initially substituting the Si in Ti₃SiC₂ with Au. At the end of this exfoliation procedure the monolayer Au is left, which electron microscope studies showed to be stable and intact. With goldene now relatively easy to produce in any well-equipped laboratory, its uses can be explored. As a rare metal monolayer, the same wet exfoliation method used for goldene synthesis might work for other metals as well.

The Myth Of Propellantless Space Propulsion Refuses To Die

April 25, 2024 by Maya Posch 111 Comments

In a Universe ruled by the harsh and unyielding laws of Physics, it’s often tempting to dream of mechanisms which defy these rigid restrictions. Although over the past hundred years we have made astounding progress in uncovering ways to work within these restrictions — including splitting and fusing atoms to liberate immense amounts of energy — there are those who dream of making reality a bit more magical. The concept of asymmetrical electrostatic propulsion is a major player here, with the EmDrive the infamous example. More recently [Dr. Charles Buhler] proposed trying it again, as part of his company Exodus Propulsion Technologies.

This slide from Dr. Buhler’s APEC presentation shows the custom-made vacuum chamber built to test their propellantless Propulsion drive in a simulated space environment. Image Credit: Exodus Propulsion Technologies, Buhler, et al.

The problem with such propellantless space propulsion proposals is that they violate the core what we know about the physical rules, such as the conclusion by Newton that for any action there has to be an opposite reaction. If you induce an electrostatic field or whatever in some kind of device, you’d expect any kind of force (‘thrust’) this creates to act in all directions equally, ergo for thrust to exist, it has to push on something in the other direction. Rocket and ion engines (thrusters) solve this by using propellant that create the reaction mass.

The EmDrive was firmly disproven 2021 by [M. Tajmar] and colleagues in their paper titled High-accuracy thrust measurements of the EMDrive and elimination of false-positive effects as published in CEAS Space Journal, which had the researchers isolate the EmDrive from all possible outside influences. Since the reported thrust was on the level of a merest fraction of a Newton, even the impact from lighting in a room and body heat from the researchers can throw off the results, not to mention the heat developed from a microwave emitter as used in the EmDrive.

Meanwhile True Believers flock to the ‘Alt Propulsion Engineering Conference’ (APEC), as no self-respecting conference or scientific paper will accept such wishful claims. In the case of [Buhler], he claims that their new-and-improved EmDrive shows a force of 10 mN in a ‘stacked system’, yet no credible paper on the experiments can be found other than APEC presentations. Until their prototype is tested the way the EmDrive was tested by [M. Tajmar] et al., it seems fair to assume that the rules of physics as we know them today remain firmly intact.

The Performance Impact Of C++’s `final` Keyword For Optimization

April 24, 2024 by Maya Posch 22 Comments

In the world of software development the term ‘optimization’ is generally reason for experienced developers to start feeling decidedly nervous, especially when a feature is marked as an ‘easy and free optimization’. The final keyword introduced in C++11 is one of such features. It promises a way to speed up object-oriented code by omitting the vtable call indirection by marking a class or member function as – unsurprisingly – final, meaning that it cannot be inherited from or overridden. Inspired by this promise, [Benjamin Summerton] figured that he’d run a range of benchmarks to see what performance uplift he’d get on his ray tracing project.

To be as thorough as possible, the tests were run on three different systems, including 64-bit Intel and AMD systems, as well as on Apple Silicon (M1). For the compilers various versions of GCC (12.x, 13.x), as well as Clang (15, 17) and MSVC (17) were employed, with rather interesting results for final versus no final tests. Clang was probably the biggest surprise, as with the keyword added, performance with Clang-generated code absolutely tanked. MSVC was a mixed bag, as were the GCC versions other than GCC 13.2 on AMD Ryzen, which saw a bump of a few percent faster.

Ultimately, it seems that there’s no free lunch as usual, and adding final to your code falls distinctly under ‘only use it if you know what you’re doing’. As things stand, the resulting behavior seems wildly inconsistent.

New JEDEC DDR5 Memory Specification: Up To 8800 MT/s, Anti-Rowhammer Features

April 23, 2024 by Maya Posch 5 Comments

Rapid row activations (yellow rows) may change the values of bits stored in victim row (purple row). — “Row hammer” by Dsimic – Own work. Licensed under CC BY-SA 4.0 via Wikimedia Commons.

As DDR SDRAM increases in density and speed, so too do new challenges and opportunities appear. In the recent DDR5 update by JEDEC – as reported by Anandtech – we see not only a big speed increase from the previous maximum of 6800 Mbps to 8800 Mbps, but also the deprecation of Partial Array Self Refresh (PASR) due to security concerns, and the introduction of Per-Row Activation Counting (PRAC), which should help with row hammer-related (security) implications.

Increasing transfer speeds is primarily a matter of timings within the limits set by the overall design of DDR5, while the changes to features like PASR and PRAC are more fundamental. PASR is mostly a power-saving feature, but can apparently be abused for nefarious means, which is why it’s now gone. As for PRAC, this directly addresses the issue of row hammer attacks. Back in the 2014-era of DDR3, row hammer was mostly regarded as a way to corrupt data in RAM, but later it was found to be also a way to compromise security and effect exploits like privilege escalation.

The way PRAC seeks to prevent this is by keeping track of how often a row is being accessed, with a certain limit after which neighboring memory cells get a chance to recover from the bleed-over that is at the core of row hammer attacks. All of which means that theoretically new DDR5 RAM and memory controllers should be even faster and more secure, which is good news all around.

Amazon Ends California Drone Deliveries While Expanding To Arizona

April 23, 2024 by Maya Posch 17 Comments

The outgoing MK27 drone used by Amazon today for deliveries. (Credit: Amazon)

When Amazon started its Prime Air drone delivery service in 2022, it had picked College Station (Texas) and Lockeford (California) as its the first areas where the service would be offered. Two years later, Amazon has now announced that it will be expanding to the West Valley of the Phoenix Metro area in Arizona from a new Tolleson center, while casually mentioning buried in the press release that the Lockeford area will no longer be serviced. No reason for this closure was provided, but as a quite experimental service drastic shifts can be expected as Amazon figures out what does and does not work.

Amazon Prime Air features custom drones that can transport packages up to 5 lbs (~2.27 kg) to its destination within an hour, if the item is listed as Prime Air capable for your area. Along with the change in service areas, Amazon is also testing its new MK30 drone (pictured, top), which should be much quieter due to a new propeller design and have twice the range of the old MK27 as well.

Even if flying drone delivery isn’t quite a blow-away success yet, Amazon doesn’t seem to be letting up on investing in it, and it could be argued that for certain items like medication or perishables, it does make a certain sense over traditional delivery and pick-up methods.