Supercon Keynote: Dr. Megan Wachs On RISC-V

November 6, 2019 by Elliot Williams 28 Comments

Hackaday has open-source running deep in our veins — and that goes for hardware as well as software. After all, it’s great to run open-source software, but if it’s running on black-box hardware, the system is only half open. While software has benefited mightily from all of the advantages of community development, the hardware world has been only recently catching up. And so we’ve been following the RISC-V open-source CPU development with our full attention.

Our keynote speaker for the 2019 Hackaday Superconference is Dr. Megan Wachs, the VP of Engineering at SiFive, the company founded by the creators of the RISC-V instruction-set architecture (ISA). She has also chaired the RISC-V Foundation Debug Task Group, so it’s safe to say that she knows RISC-V inside and out. If there’s one talk we’d like to hear on the past, present, and future of the architecture, this is it.

The RISC-V isn’t a particular chip, but rather it’s a design for how a CPU works, and a standard for the lowest-level language that the machine speaks. In contrast to proprietary CPUs, RISC-V CPUs from disparate vendors can all use the same software tools, unifying and opening their development. Moreover, open hardware implementations for the silicon itself mean that new players can enter the space more easily, bring their unique ideas to life faster, and we’ll all benefit. We can all work together.

It’s no coincidence that this year’s Supercon badge has two RISC-V cores running in its FPGA fabric. When we went shopping around for an open CPU core design, we had a few complete RISC-V systems to pick from, full compiler and development toolchains to write code for them, and of course, implementations in Verilog ready to flash into the FPGA. The rich, open ecosystem around RISC-V made it a no-brainer for us, just as it does for companies making neural-network peripherals or even commodity microcontrollers. You’ll be seeing a lot more RISC-V systems in the near future, on your workbench and in your pocket.

We’re tremendously excited to hear more about the project from the inside, and absolutely looking forward to Megan’s keynote speech!

The Hackaday Superconference is completely sold out, but that doesn’t mean that you have to miss out. We’ll be live-streaming the keynote and all other talks on the Supercon main stage, so subscribe our YouTube channel and you won’t miss a thing.

GigaDevice Releasing RISC-V MCUs And Development Boards

August 27, 2019 by Maya Posch 30 Comments

Probably not too many people have heard of Chinese manufacturer GigaDevice who so far has mostly been known as a NOR Flash memory manufacturer. Their GD32 range of MCUs is however STM32-compatible, making them interesting (cheaper) alternatives to sourcing directly from ST. Now GigaDevice has announced during a presentation that they are releasing a range of RISC-V-based MCUs: the GD32V series.

As GigaDevice has not yet updated their English-language website, the information we do have is based on CNX-Software‘s translations from Chinese. The specs for the GD32VF103 series of MCUs are listed by them as follows:

Core – GD32VF103 RISC-V “Bumblebee Core” @ 108 MHz
Memory – 8KB to 32KB SRAM
Storage – 16KB to 128KB flash
Peripherals – USB OTG and CAN 2.0B
I/O – 3.3V, 5V tolerant
Supply Voltage – 2.6 to 3.6V
Package – QFN36, LQFP48, LQFP64, and LQFP100 packages

Whether they are pin-compatible with the GD32 MCUs is still to be confirmed. If that turns out to be the case, then this might be an interesting drop-in solution for some products. From the specs it seems clear that they are targeting the lower-end ARM-based MCUs such as ST’s Cortex-M3-based STM32F103, which are quite common in a large range of embedded systems.

Seeing a performance comparison between both types of MCU would be interesting to see as lower power usage and higher efficiency compared to the ARM cores is being claimed. Both MCUs and development boards are already available for sale at Tmall, with the basic GD32VF103C-START board going for about $11 and the GD32VF103TBU6 MCU (QFN36, 64 kB Flash) for roughly $1.27.

Documentation and SDKs in English seem to be a bit scarce at this point, but hopefully before long we too will be able to use these MCUs without having to take up Chinese language classes.

Thanks to [Flaviu] for the tip!

New Part Day: A 64-Bit RISC-V CPU In Raspberry Pi Hat Form

May 24, 2019 by Brian Benchoff 30 Comments

Over the last few years the open-source RISC-V microprocessor has moved from existing only on FPGAs into real silicon, and right now you can buy a RISC-V microcontroller with all the bells and whistles you would ever want. There’s an interesting chip from China called the Sipeed M1 that features a dual-core RISC-V core running at 600MHz, a bunch of I/Os, and because it’s 2019, a neural network processor. We’ve seen this chip before, but now Seeed Studios is selling it as a Raspberry Pi Hat. Is it an add-on board for a Pi, or is it its own standalone thing? Who knows.

The Grove AI Hat for Edge Computing, as this board is called, is built around the Sipeed MAix M1 AI Module with a Kendryte K210 processor. This is a dual-core 64-bit RISC-V chip and it is obviously the star of the show here. In addition to this chip you’ve also got a few Grove headers for digital I/O, I2C, PWM, and a UART. There’s a a USB Type C for power (finally we’re getting away from USB micro power plugs), and of course a 40-pin Raspberry Pi-style header.

This board is essentially a breakout board for the Sipeed M1 chip, which is one of the most interesting new microcontrollers we’ve seen since it launched late last year. There’s a lot of power here, and already people are emulating the Nintendo Entertainment System on this chip with great success. The problem with this chip is that apart from making your own breakout board, there aren’t many options to get it up and running quickly. This is the solution to that; at the very least it’s a Sipeed chip on a board with a power supply, and it’s also a co-processor that can be accessed with Linux and a Raspberry Pi.

Hackaday Links: March 24, 2019

March 24, 2019 by Brian Benchoff 31 Comments

It has come to my attention that a few of you don’t know about Crystalfontz, an online store where you can find displays of all types, from USB LCD displays to I2C OLEDs, to ePaper displays. Thanks to [arthurptj] for that tip. Yes, Crystalfontz is cool, but have you ever heard of Panelook? Oh boy are there some displays at Panelook. Here’s a 1024 by 768 resolution display that’s less than half an inch across.

The comments section of Hackaday has been pretty tame as of late, so here’s why Apple is the king of design. It’s a question of fillets. There are a few ways to add a fillet to the corner of an icon or a MacBook. The first is to draw two perpendicular lines, then add a fixed radius corner. The Apple way is to make everything a squircle. The ‘squircle’ way of design is that there are no sudden jumps in curvature, and yes, you can do this in Fusion360 or any other design tool. This is also one of those things you can’t unsee once you know about it, like the arrow in the FedEx logo.

The ESP8266 simply appeared one day, and it changed everything. The ESP32, likewise, also just arrived on the Internet one day, and right now it’s the best solution for a microcontroller, with WiFi, that also does things really fast. Someone over at Espressif is dropping hints of a new microcontroller, with a possible release on April 1st (the same date that Apple released their competitor to the Raspberry Pi). Is it RISC-V? Is it 5V tolerant? Who knows! (Editor’s note: it’s not RISC-V. Though they’re saying that’s in the pipeline.)

The Verge got their hands on an original iPhone engineering validation unit. It’s a breakout board for an iPhone.

San Dimas High School Football Rules

There’s a screwdriver in your toolbox that has a cast clear handle, a blue ferrule surrounding the shaft, and red and white lettering on the side. Go check, it’s there. It’s a Craftsman screwdriver. It’s an iconic piece of design that’s so ubiquitous that it’s unnoticeable. It’s just what a screwdriver is. It’s a prototypical screwdriver. Thanks to the rise of resin and turning craftsmanship, there’s now a gigantic version of this screwdriver.

[The 8-Bit Guy] posted the following message on his Facebook on March 19th: “Just FYI – somebody hacked and totally erased my website. So, it’s going to be down for a while.” At the time of this writing, everything looks okay, which brings up the larger question of why Facebook is still a thing. We’re on a gradient of coolness here, and the sooner you delete your Facebook, the cooler you are. I, for example, deleted my Facebook during the Bush administration, and we all know how cool I am. I’ll never get to the singularity of coolness of kids who never had a Facebook in the first place, but the point remains: delete your Facebook old man.

[SirEdmar] wants to bring Fusion 360 to Linux users. Autodesk wants the same, and they tried a web-based version of Fusion 360, but… it’s a web version of Fusion 360. Right now the best solution is Wine, and thanks to [SirEdamr] 360 works in Wine.

Bing translate does Klingon! How well does it work? Not bad, it could use some work, mostly with non-standard vocabulary:

NES On RISC-V

March 14, 2019 by Brian Benchoff 19 Comments

RISC architecture might change the world, but it runs an NES emulator right now. That’s thanks to MaixPy, the new MicroPython for the K210, the recently released RISC-V microcontroller that’s making waves in the community. [Robot Zero One] has the tutorial and [Other Dave] of EEVBlog has a video of the thing in action.

The Sipeed K210 came to the English-speaking world in the form of a weird pre-order thing on Taobao last October promising a dual-core RISC-V CPU for just a few bucks. Seeed, the same people who brought the ESP8266 into mass distribution quickly latched on and started selling modules last February. Now, Seeed is looking at a Raspberry Pi hat using a Sipeed module, and the future for RISC-V microcontrollers is looking great. Now someone just needs to write some software. That’s exactly what the engineers at Sipeed did, and somewhere in one of the released binaries there’s an NES emulator.

The parallel to the question of if something can run Doom is if something can run an NES emulator, so with the release of MicroPython support for the K210, the obvious thing to do is to release an NES emulator. The hardware required is a Maix M1w Dock, available from Seeed and Banggood.

The new support for MicroPython is great, and an NES emulator is amazing, but this should really come as no surprise. From our first hands on with the first Open Source microcontroller two years ago, RISC-V was obviously faster. Now it’s cheap, and we can’t wait to see what’ll come next.

Continue reading “NES On RISC-V” →

Western Digital Releases Their RISC-V Cores To The World

February 13, 2019 by Brian Benchoff 66 Comments

What grew out of a university research project is finally becoming real silicon. RISC-V, the ISA that’s completely Big-O Open, is making inroads in dev boards, Arduino-ish things, and some light Internet of Things things. That’s great and all, but it doesn’t mean anything until you can find RISC-V cores in actual products. The great hope for RISC-V in this regard looks to be Western Digital, manufacturers of storage. They’re going to put RISC-V in all their drives, and they’ve just released their own version of the core, the SweRV.

Last year, Western Digital made the amazing claim that they will transition their consumption of silicon over to RISC-V, putting one Billion RISC-V cores per year into the marketplace. This is huge news, akin to Apple saying they’re not going to bother with ARM anymore. Sure, these cores won’t necessarily be user-facing but at least we’re getting something.

As far as technical specs for the Western Digital SweRV core go, it’s a 32-bit in-order core, with a target implementation process of 28nm, running at 1.8GHz. Performance per MHz is good, and if you want a chip or device to compare the SweRV core to (this is an inexact comparison, because we’re just talking about a core here and not an entire CPU or device), we’re looking at something between a decade-old iPhone or a very early version of the Raspberry Pi and a modern-ish tablet. Again, an inexact comparison, but no direct comparison can be made at this point.

Since Western Digital put the entire design for the SweRV core on Github, you too can download and simulate the core. It’s just slightly less than useless right now, but the design is proven in Verilator; running this on a cheap off-the-shelf FPGA dev board is almost a fool’s errand. However, this does mean there’s progress in bringing RISC-V to the masses, and putting Open cores in a Billion devices a year.

Building A RISC-V Desktop

February 11, 2019 by Brian Benchoff 15 Comments

If you want to talk about RISC-V, the Open Source instruction set for CPUs, you’re probably talking about microcontrollers. You can buy small but powerful RISC-V micros on par with an ARM Cortex-M4 right now. Deep in the pipeline are cores for something resembling SoCs, the kind you’d find in desktop NAS solutions, maybe a few routers, and smart TVs. This is great and all, but our idea of a ‘computer’ is still a desktop. When is the Open instruction set desktop coming? Well, it’s here right now. [Andrew Back] built a RISC-V desktop computer. It runs Linux, it comes in a case, it has HDMI and USB, there’s a graphics card in there somewhere, and it works. This is a desktop, running with a RISC-V core.

The core of this build is the HiFive Unleashed, a Linux-capable board from SiFive, makers of the first (production) RISC-V microcontroller. This board uses the Freedom U540 SOC built with a 28nm process, has 8GB of DDR4, and 32MB of Flash. For a board built on an Open archetecuture this is impressive, but it comes at a cost: the HiFive Unleashed ran for $1000 during its crowdfunding campaign.

But a board with an Open CPU does not a desktop make. You need peripheral IO, maybe a few PCIe, and hopefully a SATA interface. This problem has been solved by Microsemi with an Expansion board for the HiFive Unleashed. It includes a big ‘ol FPGA and all the connectors you could use. It also costs $2000.

With most of the parts ready to go, a few buttons, M.2 PCIe and SATA SSD storage, a graphics card, and a nice acrylic case were added. Thanks to Western Digital, building Linux was as easy as building Linux, and you end up with a desktop computer with a RISC-V brain.

Compared to a bog-standard ‘gaming machine’, this is an expensive build. The quick and dirty ballpark for the price is somewhere around $4000 USD for a machine that will let you check your Facebook. There’s a video of the machine running, you can check that out below.

Continue reading “Building A RISC-V Desktop” →