RISC-V

100 Articles

RISC-V In… Typescript?

October 14, 2021 by 8 Comments

We are accustomed to seeing RISC-V implementations in Verilog or VHDL, but [Low Level JavaScript] has one in TypeScript. Before you dismiss it as a mere emulator, know that the project relies on gateware-ts, a conversion between TypeScript and Verilog. From there, you can actually put the CPU on an FPGA. You can see the launch video below and there is one development video as well as, presumably, more to come.

We aren’t sure if many FPGA designers will be willing to switch to TypeScript. But if you are comfortable with it, it might open up FPGA development without having to learn as much of a new language.

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Hands-On: Whiskey Pirates DC29 Hardware Badge Blings With RISC-V

August 6, 2021 by 6 Comments

The Whiskey Pirates have once again dropped an excellent electronic badge for DEF CON 29. This is, of course, unofficial, but certainly makes the list of the hottest custom bling seen so far this year.

I’m not able to make it to the con in person, but the Pirates sent over one of these badges anyway for an early look. It’s gorgeous, and peering into the circuit board it would be easy to think that the chip shortage ain’t got nothin’ on this badge. But this was possible only because of some very creative parts sourcing, and a huge dose of inspired design work.

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New Part Day: An ESP With ZigBee

August 4, 2021 by 26 Comments

It seems that the folks at Espressif are doing their best to produce chips to fit every possible niche in the microcontroller-with-radio market, because here comes news of their latest chip bearing the ESP32 name: a single-core 96MHz RISC-V part with built-in IEEE 802.15.4 to support ZigBee 3.x and Thread 1.x. The ESP32-H2 is not the most powerful of the Espressif line-up, but it will find its place in home automation products and projects.

The ESP32-H2 joins a multitude of other IEEE 802.15.4 devices from manufacturers such as Microchip, ST, NXP, and Nordic in an increasingly crowded marketplace, so what can if offer that the others can’t? If previous ESP chips are anything to go by we’d expect it to compete on price as well as the obvious attraction for developers used to working with other Espressif products. We look forward as always to seeing what you do with it.

Custom RISC-V Processor Built In VHDL

August 3, 2021 by 30 Comments

While ARM continues to make inroads into the personal computing market against traditional chip makers like Intel and AMD, it’s not a perfect architecture and does have some disadvantages. While it’s a great step on the road to software and hardware freedom, it’s not completely free as it requires a license to build. There is one completely open-source and free architecture though, known as RISC-V, and its design and philosophy allow anyone to build and experiment with it, like this build which implements a RISC-V processor in VHDL.

Since the processor is built in VHDL, a language which allows the design and simulation of integrated circuits, it is possible to download the code for the processor and then program it into virtually any FPGA. The processor itself, called NEORV32, is designed as a system-on-chip complete with GPIO capabilities and of course the full RISC-V processor implementation. The project’s creator, [Stephan], also struggled when first learning about RISC-V so he went to great lengths to make sure that this project is fully documented, easy to set up, and that it would work out-of-the-box.

Of course, since it’s completely open-source and requires no pesky licensing agreements like an ARM platform might, it is capable of being easily modified or augmented in any way that one might need. All of the code and documentation is available on the project’s GitHub page. This is the real benefit of fully open-source hardware (or software) which we can all get behind, even if there are still limited options available for RISC-V personal computers for the time being.

How does this compare to VexRISC or PicoSOC? We don’t know yet, but we’re always psyched to have choices.

It’s Linux – But On An ESP32

July 21, 2021 by 44 Comments

GNU/Linux is an open-source marvel that has over the past three decades given us an almost infinitely versatile and powerful UNIX-like operating system. But even it has its limitations, particularly at the lower end of the hardware scale where less fully-featured processors often lack the prerequisites such as a memory management unit. Thus [JuiceRV]’s feat of booting a Linux kernel on an ESP32 microcontroller seems impossible, what’s happening?

The ESP’s dual 32-bit Xtensa cores are no slouch in the processing power department, but without that MMU it’s not an obvious Linux candidate platform. The solution to this problem comes in the form of an emulated RISC-V virtual machine which provides just enough grunt for a Linux 5.0.0 kernel to boot.

By any measure this represents an impressive piece of work, but will this new-found ability to run Linux on a microcontroller take the world by storm? Of course not, unless your tastes run to the very slowest of computing experiences. It is however the essence of the hack, and for that we salute it.

It’s not the first time Linux has run on a microcontroller, in the past someone hooked up a 30 pin SIMM and an SD card to an 8-bit Atmel chip and did it in a similar way with an ARM emulator.

Via CNX Software.

Header image: Ubahnverleih, CC0.

Will We Soon Be Running Linux On SiFive Cores Made By Intel?

June 25, 2021 by 38 Comments

There’s an understandably high level of interest in RISC-V processors among our community, but while we’ve devoured the various microcontroller offerings containing the open-source core it’s fair to say we’re still waiting on the promise of more capable hardware for anything like an affordable price. This could however change, as the last week or so has seen a flurry of interest surrounding SiFive, the fabless semiconductor company that has pioneered RISC-V technology. Amid speculation of a $2 billion buyout offer from the chip giant Intel it has been revealed that the company best known for the x86 line of processors has licensed the SiFive portfolio for its 7nm process. This includes their latest and fastest P550 64-bit core, bringing forward the prospect of readily available high-power RISC-V computing. Your GNU/Linux box could soon have a processor implementing an open-source ISA, without compromising too much on speed and, we hope, price.

All this sounds pretty rosy, but there is of course a downer for open-source hardware enthusiasts. These chips may rely on some open-source technologies, but sadly they will not themselves be open-source chips as there will be plenty of proprietary IP contained within them. We can thus only hope that Intel see fit to provide the same level of Linux support for them as they do for their x86 ranges, and we’re not left in the same situation with respect to ongoing support as we are with so many other chips. Meanwhile it’s worth remembering that SiFive are not the only player in the world of RISC-V cores, so it’s likely that competitors to the P550 and its stablemates will not be far behind.

If you’d like a more in-depth explanation of the true open-source nature of a RISC-V chip, we’ve featured something on that theme before.

Header image: Gareth Halfacree, CC BY-SA 2.0.

Compute Like It Is 1975: 6th Edition Unix Reborn

April 21, 2021 by 13 Comments

If you crave experiencing or reliving what computing was like “back then” you have a lot of options. One option, of course, is to load an emulator and pretend like you have the hardware and software you are interested in. Another often expensive option is to actually buy the hardware on the used market. However, [mit-pdos] has a different approach: port the 6th edition of Unix to RISC-V and use a modern CPU to run an old favorite operating system.

It isn’t an exact copy, of course, but Xv6 was developed back in 2006 as a teaching operating system at MIT. You can find resources including links to the original Unix source code, commentary on the source code, and information about the original PDP 11/40 host computer on the project’s main page.

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