Last time I talked about how I took the open source Verifla logic analyzer and modified it to have some extra features. As promised, this time I want to show it in action, so you can incorporate it into your own designs. The original code didn’t actually capture your data. Instead, it created a Verilog simulation that would produce identical outputs to your FPGA. If you were trying to do some black box simulation, that probably makes sense. I just wanted to view data, so I created a simple C program that generates a VCD file you can read with common tools like
gtkwave. It is all on GitHub along with the original files, even though some of those are not updated to match the new code (notably, the PDF document and the examples).
If you have enough pins, of course, you can use an external logic analyzer. If you have enough free space on the FPGA, you could put something like SUMP or SUMP2 in your design which would be very flexible. However, since these analyzers are made to be configurable from the host computer, they probably have a lot of circuitry that will compete with yours for FPGA space. You configure Verifla at compile time which is not as convenient but lets it have a smaller footprint.
Continue reading “X-Ray Vision for FPGAs: Using Verifla”
All of the tools you need to work with the FPGA Arduino — the Vidor — are now in the wild!
We reported earlier that a series of French blog posts finally showed how all the pieces fit together to program the FPGA on the Arduino MKR4000 Vidor board. Of course, I wasn’t content to just read the Google translation, I had to break out the board and try myself.
I created a very simple starter template, a tool in C to do the bitstream conversion, required, and bundled it all together in one place. Here’s how you can use my starter kit to do your own FPGA designs using the Vidor. I’m going to assume you know about FPGA basics and Verilog. If you don’t, why not check out the FPGA boot camps first?
The first thing you’ll want to do is grab my GitHub repo. You’ll also need the Arduino IDE (a recent copy) and Intel’s Quartus software. Inside, you’ll find three directories, two of which contain slightly modified copies of original Arduino files. But before you start digging in, let’s get the high-level overview of the process.
Continue reading “Hands on with the Arduino FPGA”
The GePS is a musical project that shows how important integration work is when it comes to gesture controls. Creators [Cedric Spindler] and [Frederic Robinson] demonstrate how the output of a hand-mounted IMU (Inertial Measurement Unit) and magnetometer can be used to turn motion, gestures, and quick snap movements into musical output. The GePS is designed to have enough repeatability and low enough latency that feedback is practically immediate. As a result, it can be used and played like any other musical instrument that creates sound from physical movements in a predictable way. It’s not unlike a Theremin in that way, but much more configurable.
To do this, [Cedric] and [Frederic] made GePS from a CurieNano board (based on Intel’s Curie, which also has the IMU on-board) and an XBee radio for a wireless connection to software running on a computer, from which the sounds are played. The device’s sensitivity and low lag means that even small movements can be reliably captured, meaning that the kind of fluid and complex movements that hands do every day can be used as the basis for playing sounds with immediate feedback. In a very real sense, the glove-based GePS is an experimental kind of new instrument, which makes it a fascinating contender for the Musical Instrument Challenge portion of the 2018 Hackaday Prize.
It’s been at least a month or two since the last vulnerability in Intel CPUs was released, but this time it’s serious. Foreshadow is the latest speculative execution attack that allows balaclava-wearing hackers to steal your sensitive information. You know it’s a real 0-day because it already has a domain, a logo, and this time, there’s a video explaining in simple terms anyone can understand why the sky is falling. The video uses ukuleles in the sound track, meaning it’s very well produced.
The Foreshadow attack relies on Intel’s Software Guard Extension (SGX) instructions that allow user code to allocate private regions of memory. These private regions of memory, or enclaves, were designed for VMs and DRM.
How Foreshadow Works
The Foreshadow attack utilizes speculative execution, a feature of modern CPUs most recently in the news thanks to the Meltdown and Spectre vulnerabilities. The Foreshadow attack reads the contents of memory protected by SGX, allowing an attacker to copy and read back private keys and other personal information. There is a second Foreshadow attack, called Foreshadow-NG, that is capable of reading anything inside a CPU’s L1 cache (effectively anything in memory with a little bit of work), and might also be used to read information stored in other virtual machines running on a third-party cloud. In the worst case scenario, running your own code on an AWS or Azure box could expose data that isn’t yours on the same AWS or Azure box. Additionally, countermeasures to Meltdown and Spectre attacks might be insufficient to protect from Foreshadown-NG
The researchers behind the Foreshadow attacks have talked with Intel, and the manufacturer has confirmed Foreshadow affects all SGX-enabled Skylake and Kaby Lake Core processors. Atom processors with SGX support remain unaffected. For the Foreshadow-NG attack, many more processors are affected, including second through eighth generation Core processors, and most Xeons. This is a significant percentage of all Intel CPUs currently deployed. Intel has released a security advisory detailing all the affected CPUs.
Alorium rolled out a new product late last year that caught our attention. The Sno (pronounced like “snow”) board is a tiny footprint Arduino board that you can see in the video below. By itself that isn’t that interesting, but the Sno also has an Altera/Intel Max 10 FPGA onboard. If you aren’t an FPGA user, don’t tune out yet, though, because while you can customize the FPGA in several ways, you don’t have to.
Like Alorium’s XLR8 product, the FPGA comes with preprogrammed functions and a matching Arduino API to use them. In particular, there are modules to do analog to digital conversion, servo control, operate NeoPixels, and do floating point math.
Continue reading “Tiny Arduino + FPGA = Sno”
They probably weren’t inspired by [Jeff Dunham’s] jalapeno on a stick, but Intel have created the Movidius neural compute stick which is in effect a neural network in a USB stick form factor. They don’t rely on the cloud, they require no fan, and you can get one for well under $100. We were interested in [Jeff Johnson’s] use of these sticks with a Pynq-Z1. He also notes that it is a great way to put neural net power on a Raspberry Pi or BeagleBone. He shows us YOLO — an image recognizer — and applies it to an HDMI signal with the processing done on the Movidius. You can see the result in the first video, below.
At first, we thought you might be better off using the Z1’s built-in FPGA to do neural networks. [Jeff] points out that while it is possible, the Z1 has a lower-end device on it, so there isn’t that much FPGA real estate to play with. The stick, then, is a great idea. You can learn more about the device in the second video, below.
Continue reading “Neural Networks… On a Stick!”
FPGAs can have a steep learning curve, so getting started tutorials are a popular topic. Intel recently published a video titled “Basics of Programmable Logic: FPGA Architecture” and you can see it below. Of course, Intel bought Altera, so the material has a bit of Altera/Intel flavor to it, but the course is generic enough that the concepts will apply to just about any FPGA.
Of course, if you do want to use Quartus, there are quite a few follow-on courses, including the wonderfully named “Become a [sic] FPGA Designer in 4 Hours.” We’d really like to see a sequel titled “Become a Proficient FPGA Designer in 9 Months” but Google didn’t turn that one up.
Continue reading “Another Introduction to FPGAs”