Improving the Parallax Propeller in an FPGA

The Parallax Propeller is an interesting chip that doesn’t get a lot of love, but since the entire chip was released as open source, that might be about to change: people are putting this chip inside FPGA and modifying the binaries to give the chip functions that never existed in the original.

Last August, Parallax released the source for the P8X32A, giving anyone with an FPGA board the ability to try out the Prop for their own designs. Since then, a few people have put some time in, cleaning up the files, unscrambling ROM images, fixing bugs, and all the general maintenance that an open source microcontroller core requires.

[Sylwester] has grabbed some of the experimental changes found on the Parallax forum and included them as a branch of the Propeller source. There is support for a second 32-bit port, giving the new chip 64 I/O pins, multiply instructions, video generators, hard-coded SD card libraries, and a variant called a microProp that has four cores instead of eight.

You can grab all the updated sources right here and load them up on a DE0 Nano FPGA board. If you’re exceptionally lucky and have the Altera DE2-115 dev board, you’ll also be able to run the upcoming Propeller 2.

Building a Retro Computer that Never Existed

VNC ViewerScreenSnapz009

Sometimes you come across a build so far along you wish you could go back and enjoy it just a bit at a time. This C65 build is so far along, it’s like binge watching a retro computer build. One that never actually existed.

Okay, that’s admittedly a bit rash. But technically the C65 (successor to the Commodore C64) never saw its way through development. A good place to start looking in on the build is from the second post way back in March. The FPGA-based project is already looking promising with proof-of-concept display tests. Are we the only ones surprised by the 1920 native display resolution?

Checking back in June we see that there is some software working but a bounty of bugs will definitely keep [Paul] busy for a while. Fast forward to the beginning of September and he’s come full through to getting a network connection up and running.

The Wikipedia page on the C65 gives a good idea of how awesome this would have been back in the day had it actually made it to market. We suppose it joins the Commodore lists of would-haves and should-haves with the likes of the C128.

FPGA with Open Source Propeller 1 Running Spin

fpga-running-p8x32a-and-sidcog

Open Sourcing something doesn’t actually acquire meaning until someone actually uses what has been unleashed in the wild. We’re happy to see a working example of Propeller 1 on an FPGA dev board. That link takes you to a short description and some remapping of the pins to work with a BeMicro CV board. But you’ll want to watch the video below, or rather listen to it, for a bit more explanation of what [Sylwester] did to get this working.

You’ll remember that Parallax released the Propeller 1 as Verilog code a few weeks back. This project first loads the code onto the FPGA, then proves it works by running SIDcog, the Commodore 64 sound emulation program written in Spin for p8x32a processors.

We do find this to be an interesting first step. But we’re still waiting to see what type of hacks are made possible because of the newly available Verilog code. If you have a proof of concept working on other hardware, certainly tell us about it below. If you’ve been hacking on it and have something you want to show off, what are you waiting for?

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A MIPI DSI Display Shield/HDMI Adapter

MIPI DSI shield

[Tomasz] tipped us about the well documented MIPI DSI Display Shield / HDMI Adapter he put on hackaday.io. The Display Serial Interface (DSI) is a high speed packet-based interface for delivering video data to recent LCD/OLED displays. It uses several differential data lanes which frequencies may reach 1 GHz depending on the resolution and frame rate required.

The board explained in the above diagram therefore allows any HDMI content to be played on the DSI-enabled scrap displays you may have lying around. It includes a 32MB DDR memory which serves as a frame buffer, so your “slow” Arduino platform may have enough time to upload the picture you want to display.

The CP2103 does the USB to UART conversion, allowing your computer to configure the display adapter internal settings. The platform is based around the XC6SLX9 Spartan-6 FPGA and all the source code may be downloaded from the official GitHub repository, along with the schematics and gerbers. After the break we’ve embedded a demonstration video in which a Raspi drives an iPhone 4 LCD.

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An FPGA Based 6502 Computer

A diagram of the CHOCHI Board

It’s no secret that people love the 6502 processor. This historic processor powered some of our favorite devices, including the Apple II, the Commodore 64, and the NES. If you want to play with the 6502, but don’t want to bother with obtaining legacy chips, the CHOCHI board is for you.

While many people have built modern homebrew 6502 computers, the CHOCHI will be much easier for those looking to play with the architecture. It’s based on a Xilinx XC3S50 FPGA which comes preconfigured as a 6502 processor.

After powering on the board, you can load a variety of provided binaries onto it. This collection includes a BASIC interpreter and a Forth interpreter. Of course, you’re free to write your own applications in 6502 assembly, or compile C code for the device using the cc65 compiler.

If you get bored with the 6502 core, you can always grab Xilinx’s ISE WebPACK for free and use the board as a generic FPGA development tool. It comes with 128K of SRAM and 31 I/O pins. Not bad for a $30 board.

Counting Really, Really Fast With An FPGA

fast

During one of [Michael]‘s many forum lurking sessions, he came across a discussion about frequency counting on a CPLD. He wondered if he could do the same on an FPGA, and how hard it would be to count high clock rates. As it turns out, it’s pretty hard with a naive solution. Being a bit more clever turns the task into a cakewalk, with a low-end FPGA being able to count clocks over 500 MHz.

The simplest solution for counting a clock would be to count a clock for a second with a huge, 30-bit counter. This is a terrible idea: long counters have a lot of propagation delays. Also, any sampling would have to run at least twice as fast as the input signal – not a great idea if you’re counting really fast clocks.

The solution is to have the input signal drive a very small counter – only five bits – and sample the counter using a slower clock on board the FPGA. [Michael] used a 5-bit Gray code, getting rid of the problem of the ‘11111’ to ‘00000’ rollover of a normal binary counter.

Because [Michael] is using a 5 bit clock with 31 edges sampled at 32 MHz, he can theoretically sample a 992 MHz clock. There isn’t a chance in hell of the Spartan 6 on his Papilio Pro board ever being able to measure that, but he is able to measure a 500 MHz clock, something that would be impossible without his clever bit of code.

Programmable Logic II – CPL

There is a wide assortment of cheap development (dev) boards for Complex Programmable Logic Devices (CPLD), the smaller cousin of the Field Programmable Logic Array (FPLA)

Using an inexpensive board and the development software that’s free to download from the major programmable companies such as Xilinx and Altera, the only additional thing needed is a programmer module. Cheap ones are available on Ebay but I am hoping that someone takes the time to teach an ARM/Arduino to step in as a programmer.

I have a small collection of dev boards including some Ebay specials and also designs I did a few years ago to choose from. For today I am grabbing a newer board that has not been fully checked out yet; an Altera Max V device. I have stuffed the CPLD, the clock oscillator, some LED’s and part of the onboard power supply along with the JTAG header needed to program the CPLD and that’s about it.

 

Herdware CPLD 5M570ZT

Herdware CPLD 5M570ZT dedicated PCB with SRAM.

 

CPLD Schematic

CPLD Schematic showing an Altera CPLD 5M570T144

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