The BBC Microcomputer System (or BBC Micro) was an innovative machine back in the early 1980’s. One feature that impressed reviewers was a “tube” interface that allowed the machine to become an I/O processor for an additional CPU. When the onboard 6502 became too slow, it could become a slave to a Z-80 or even an ARM processor. The bus was actually useful for any high-speed device, but its purpose was to add new processors, a feature Byte magazine called “innovative.”
[Hoglet67] has released a very interesting set of FPGA designs that allows a small board sporting a Xilinx Spartan 3 to add a 6502, a Z80, a 6809, or a PDP/11 to a BBC Micro via the tube interface. There’s something satisfying about a classic computer acting as an I/O slave to a fairly modern FPGA that implements an even older PDP/11.
Continue reading “Vintage BBC Computer gets FPGA Buddies”
Imagine that you’re running a conference and you want to do a professional job recording the speakers and their decks. You’ll need to record one video stream from the presenter’s laptop, and it’d be nice to have another of the presenter taken with a camera. But you also need to have the presenter’s screen displayed on a projector or two for the live audience. And maybe you’d like all of this dumped down to your computer so that you can simultaneously archive the presentation and stream it out over the Internet.
That’s exactly the problem that the hdmi2usb project tries to solve on the software side for open-source software conventions. And to go with this software, [Tim Ansell] has built the Numato Opsis FPGA video board, to tie everything together. What’s great about the platform is that the hardware and the firmware are all open source too.
Because everything’s open and it’s got an FPGA on board doing the video processing, you’re basically free to do whatever you’d like with the content in transit, so it could serve as an FPGA video experimenter board. It also looks like they’re going to port code over so that the Opsis could replace the discontinued, but still open source, Milkimist One video effects platform.
One thing that’s really cute about the design is that it reports over USB as being a camera, so you can record the resulting video on any kind of computer without installing extra drivers. All in all, it’s an FPGA-video extravaganza with a bunch of open-source software support behind it. Very impressive, [Tim]!
You have an FPGA circuit and you want the user to interact with your circuit by pushing a button. Clearly, you need a button, right? Not so fast! [Clifford Wolf] recently found a mysterious effect that lets him detect when someone pushes on his iCEstick board.
The video below shows the mystery circuit (which is just the stock iCEstick board), which appears to react any time you flex the PC board. The Verilog implements a simple ring oscillator (basically an inverter with its output tied to its input).
Continue reading “Mystery FPGA Circuit Feels the Pressure”
In the previous installment, we talked about why flip flops are such an important part of digital design. We also looked at some latch circuits. This time, I want to look at some actual flip flops–that is circuit elements that hold their state based on some clock signal.
Just like last time, I want to look at sequential building blocks in three different ways: at the abstraction level, at the gate level, and then using Verilog and two online tools that you can also use to simulate the circuits. Remember the SR latch? It takes two inputs, one to set the Q output and the other to reset it. This unassuming building block is at the heart of many other logic circuits.
A common enhancement to the SR latch is to include an enable signal. This precludes the output from changing when the enable signal is not asserted. The implementation is simple. You only need to put an additional gate on each input so that the output of the gate can’t assert unless the other input (the enable) is asserted. The schematic appears on the right.
In the case of this simulation (or the Verilog equivalent), the SR inputs become active high because of the inversion in the input NAND gates. If the enable input is low, nothing will change. If it is high, then asserted inputs on the S or R inputs will cause the latch to set or reset. Don’t set both high at the same time when the enable is high (or, go ahead–it is a simulation, so you can’t burn anything up).(Note: If you can’t see the entire circuit or you see nothing in the circuit simulator, try selecting Edit | Centre Circuit from the main menu.)
Continue reading “Learn Flip Flops with (More) Simulation”
One of the challenges with display technology is the huge increase in bandwidth that has occurred since LCD panels took over from Cathode Ray Tubes. Low end laptops have a million pixels, UHD (“4K”) displays
have 8 million and the latest Full Ultra HD (“8k”) displays have over 33 million pixels. Updating all those pixels takes a lot of bandwidth – to update a 4k display at 60 Hz refresh rates takes close to a gigabyte per second. 8 billion bits – that is a lot of bits! That’s why VGA ports and even DVI ports are starting to vanish in favor of standards like HDMI and DisplayPort.
The current release of HDMI is 2.0, and is tightly licensed with NDAs and licensing fees. VESA, who created the DisplayPort standard, states the standard is royalty-free to implement, but since January 2010, all new DisplayPort related standards issued by VESA are no longer available to non-members.
So after receiving a new Digilent Nexys Video FPGA development board, Hackaday regular [Hamster] purchased a UHD monitor, scoured the internet for an old DisplayPort 1.1 standard, and started hacking.
A couple of months and 10,000 lines of VHDL code later what may be the first working Open Source DisplayPort
implementation is available. The design includes a 16-bit scrambler, an 8b/10b encoder, and multichannel support.
Continue reading “DisplayPort with an FPGA”
Digital design with combinatorial gates like AND, OR, and NOT gates is relatively straightforward. In particular, when you use these gates to form combinatorial logic, the outputs only depend on the inputs. The previous state of the outputs isn’t important in combinatorial logic. While this is simple, it also prevents you from building things like state machines, counters, and even CPUs.
Circuits that use their own outputs as inputs are known as sequential circuits. It is true that at the fundamental level, sequential circuits use conventional logic gates. However, you usually won’t deal with them as gates, but will deal with abstractions like latches, flip flops, and even higher level constructs. Learning about these higher level constructs will allow you to make more advanced digital designs that are robust. In fact, if you are using an FPGA, building blocks like flip flops are essential since a large portion of the chip will be made up of some kind of flip flop.
Continue reading “Learn Flip Flops with Simulation”
When you think of a CNC controller you probably think of a PC with a parallel port or some microcontroller-based solution like a Smoothie Board. [Mhouse1] has a different idea: use FPGAs as CNC controllers.
FPGAs inherently handle things in parallel, so processing G code, computing curves and accelerations, and driving multiple stepper motors at one time would not be an issue at all for an FPGA. Most computer-based designs will have slight delays when trying to drive everything at once and this introduces some mechanical jitter. Even worse jitter occurs when you have an old PC trying to run everything when some other task takes over the CPU.
Continue reading “FPGA CNC”