CPU Built From Discrete Transistors

September 30, 2023 by 31 Comments

We all know, at least intellectually, that our computers are all built with lots of tiny transistors. But beyond that it’s a little hard to describe. They’re printed on a silicon wafer somehow, and since any sufficiently advanced technology is indistinguishable from magic, they miraculously create a large part of modern society. Even most computers from 40 or 50 years ago were built around various inscrutable integrated circuits. On the other hand, this computer goes all the way back to first principles and implements a complete processor out of individual transistors instead.

The transistor computer uses over 2000 individual transistors to implement everything comprising the 11-bit CPU. The creator, Reddit user [ Weekly_Salamander_78] also has an online interactive book that walks through each of the steps that is required to get to the point of having a working computer like this. Starting with a guide on building logic gates from transistors it will eventually cover the arithmetic logic unit, adders, memory, clocks, and everything else that is needed for the complete CPU to get up and running. The design does rely on an Arduino for memory to simplify some things, and in the end it’s able to run a Hello, World! program and play a simple dinosaur game as well.

Building a computer out of discrete components like this is an impressive accomplishment, although we might not envy the creator of it when it comes time for troubleshooting or maintenance of all of those individual components. Presumably it would be much easier to work on than something like a relay computer, but for now we’ll all take a moment to be thankful that almost no one needs to work on debugging vacuum tube computers anymore.

The Bellmac-32 CPU — What?

June 6, 2025 by 34 Comments

If you have never heard of the Bellmac-32, you aren’t alone. But it is a good bet that most, if not all, of the CPUs in your devices today use technology pioneered by this early 32-bit CPU. The chip was honored with the IEEE Milestone award, and [Willie Jones] explains why in a recent post in Spectrum.

The chip dates from the late 1970s. AT&T’s Bell Labs had a virtual monopoly on phones in the United States, but that was changing, and the government was pressing for divestiture. However, regulators finally allowed Bell to enter the computing market. There was only one problem: everyone else had a huge head start.

There was only one thing to do. There was no point in trying to catch the leaders. Bell decided to leap ahead of the pack. In a time when 8-bit processors were the norm and there were nascent 16-bit processors, they produced a 32-bit processor that ran at a — for the time — snappy 2 MHz.

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Startup Claims It Can Boost CPU Performance By 2-100X

June 12, 2024 by 47 Comments

Although Moore’s Law has slowed at bit as chip makers reach the physical limits of transistor size, researchers are having to look to other things other than cramming more transistors on a chip to increase CPU performance. ARM is having a bit of a moment by improving the performance-per-watt of many computing platforms, but some other ideas need to come to the forefront to make any big pushes in this area. This startup called Flow Computing claims it can improve modern CPUs by a significant amount with a slight change to their standard architecture.

It hopes to make these improvements by adding a parallel processing unit, which they call the “back end” to a more-or-less standard CPU, the “front end”. These two computing units would be on the same chip, with a shared bus allowing them to communicate extremely quickly with the front end able to rapidly offload tasks to the back end that are more inclined for parallel processing. Since the front end maintains essentially the same components as a modern CPU, the startup hopes to maintain backwards compatibility with existing software while allowing developers to optimize for use of the new parallel computing unit when needed.

While we’ll take a step back and refrain from claiming this is the future of computing until we see some results and maybe a prototype or two, the idea does show some promise and is similar to some ARM computers which have multiple cores optimized for different tasks, or other computers which offload non-graphics tasks to a GPU which is more optimized for processing parallel tasks. Even the Raspberry Pi is starting to take advantage of external GPUs for tasks like these.

It’s Not Easy Counting Transistors In The 8086 Processor

January 16, 2023 by 15 Comments

For any given processor it’s generally easy to find a statistic on the number of transistors used to construct it, with the famous Intel 8086 CPU generally said to contain 29,000 transistors. This is where [Ken Shirriff] ran into an issue when he sat down one day and started counting individual transistors in die shots of this processor. To his dismay, he came to a total of 19,618, meaning that 9,382 transistors are somehow unaccounted for. What is going on here?

The first point here is that the given number includes so-called ‘potential transistors’. Within a section of read-only memory (ROM), a ‘0’ would be a missing transistor, but depending on the programming of the mask ROM (e.g. for microcode as with a CISC x86 CPU), there can  be a transistor there. When adding up the potential but vacant transistor locations in ROM and PLA (programmable logic array) sections, the final count came to 29,277 potential transistors. This is much closer to the no doubt nicely rounded number of 29,000 that is generally used.

[Ken] also notes that further complications here are features such as driver transistors that are commonly found near bond wire pads. In order to increase the current that can be provided or sunk by a pad, multiple transistors can be grouped together to form a singular driver as in the above image. Meanwhile yet other transistors are used as (input protection) diodes or even resistors. All of which makes the transistor count along with the process node used useful primarily as indication for the physical size and complexity of a processor.

Scott’s CPU From The Bottom Up

May 19, 2022 by 5 Comments

It isn’t for everyone, but if you work much with computers at a low level, you’ll probably sooner or later entertain the idea of creating your own CPU. There was a time when that was a giant undertaking, but with today’s tools and FPGAs it is… well, not easy, but certainly easier. If you have the urge to try your own, you might have a look at [Simply Explained’s] video series called “Building Scott’s CPU.”

The 11 videos cover everything from basic transistor logic to sequential circuits and moves on to things like ALUs, clock units, and how jump instructions work.

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The Q2, A PDP8-Like Discrete Transistor Computer

February 6, 2022 by 39 Comments

[Joe Wingbermuehle] has an interest in computers-of-old, and some past experience of building computers on perfboard from discrete transistors, so this next project, Q2, is a complete implementation of a PDP8-like microcomputer on a single PCB. Like the DEC PDP-8, this is a 12-bit machine, but instead of the diode-transistor logic of the DEC, the substantially smaller Q2 uses a simple NMOS approach. Also, the DEC has core memory, but the Q2 resorts to a pair of SRAM ICs, simply because who wants to make repetitive memory structures with discrete 2N7002 transistors anyway?

SMT components for easy machine placement

Like the PDP-8, this machine uses a bit-serial ALU, which allows the circuit to be much smaller than the more usual ALU structure, at the expense of needing a clock cycle per bit per operation, i.e. a single ALU operation will take 12 clock cycles. For this machine, the instruction cycle time is either 8 or 32 clocks anyway, and at a maximum speed of 80 kHz it’s not exactly fast (and significantly slower than a PDP-8) but it is very small. Small, and perfectly formed.

The machine is constructed from 1094 transistors, with logic in an NMOS configuration, using 10 K pullup resistors. This is not a fast way to build a circuit, but it is very compact. By looking at the logic fanout, [Joe] spotted areas with large fanouts, and reduced the pull-up resistors from 10 K to 1 K. This was done in order to keep the propagation delay within bounds for the cycle time without excessive power usage. Supply current was kept to below 500 mA, allowing the board to be powered from a USB connector. Smart!

Memory is courtesy of two battery-backed 6264 SRAMs, with the four 12-bit general purpose registers built from discrete transistors. An LCD screen on board is a nice touch, augmenting the ‘front panel’ switches used for program entry and user input. A 40-pin header was added, for programming via a Raspberry Pi in case the front panel programming switches are proving a bit tedious and error prone.

Discrete transistor D-type flip flop with indicator. Latest circuit switched to 2N7002 NMOS.

In terms of the project write-up, there is plenty to see, with a Verilog model available, a custom programming language [Joe] calls Q2L, complete with a compiler and assembler (written in Rust!) even an online Q2 simulator! Lots of cool demos, like snake. Game of Life and even Pong, add some really lovely touches. Great stuff!

We’ve featured many similar projects over the years; here’s a nice one, a really small 4-bit one, and a really big one.

 

Implementing A CPU Using 555 Timers And Logic Synthesis

December 17, 2021 by 26 Comments

There is many a comment on these here pages along the lines of “Why did you use a microcontroller, when you could just have easily used a 555 timer!” And, yes, we sometimes agree with the sentiment, but when a chance comment seen by Hackaday.io user [Tim Böscke] suggested turning it around and building a microcontroller out of 555 timers, the gauntlet was well and truly thrown down. Now let’s be clear, this is not the first time we’ve come across this idea, there was a breadboard 555 based build ten years ago, but this is the first time we’ve seen it done by leveraging open source synthesis targeting a PCB!

The first logic element was a simple inverter, constructed by tying the TRIGger and THReShold pins together.

LTSpice model of a NAND gate implemented with 555 and diodes

From there it was a simple matter of adding a few diode-resistor networks to the input, to effect a NAND2 gate and a NOR2 gate. Development was speeded up a bit by modeling the logic circuits in LTSpice, to find the best combination of part values. From these simple elements, all further logic functions could be implemented. Next a memory element was needed. As luck would have it, the 555 has a RS flip flop as part of its circuit, fed by dual comparator inputs. All that was needed was to bias the THRS input at Vdd/2 and then feed the data in via a pass transistor, and hey presto! a serviceable, albeit slow latch.

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