Macintosh System 7 Ported To X86 With LLM Help

You can use large language models for all sorts of things these days, from writing terrible college papers to bungling legal cases. Or, you can employ them to more interesting ends, such as porting Macintosh System 7 to the x86 architecture, like [Kelsi Davis] did.

When Apple created the Macintosh lineup in the 1980s, it based the computer around Motorola’s 68K CPU architecture. These 16-bit/32-bit CPUs were plenty capable for the time, but the platform ultimately didn’t have the same expansive future as Intel’s illustrious x86 architecture that underpinned rival IBM-compatible machines.

[Kelsi Davis] decided to port the Macintosh System 7 OS to run on native x86 hardware, which would be challenging enough with full access to the source code. However, she instead performed this task by analyzing and reverse engineering the System 7 binaries with the aid of Ghidra and a large language model. Soon enough, she had the classic System 7 desktop running on QEMU with a fully-functional Finder and the GUI working as expected. [Kelsi] credits the LLM with helping her achieve this feat in just three days, versus what she would expect to be a multi-year effort if working unassisted.

Files are on GitHub for the curious. We love a good port around these parts; we particularly enjoyed these efforts to recreate Portal on the N64. If you’re doing your own advanced tinkering with Macintosh software from yesteryear, don’t hesitate to let us know.

Lumafield Shows Why Your Cheap 18650 Cells Are Terrible

Lithium-ion cells deliver very high energy densities compared to many other battery technologies, but they bring with them a danger of fire or explosion if they are misused. We’re mostly aware of the battery conditioning requirements to ensure cells stay in a safe condition, but how much do we know about the construction of the cells as a factor? [Lumafield] is an industrial imaging company, and to demonstrate their expertise, they’ve subjected a large number of 18650 cells from different brands to a CT scan.

The construction of an 18650 sees the various layers of the cell rolled up in a spiral inside the metal tube that makes up the cell body. The construction of this “jellyroll” is key to the quality of the cell. [Lumafield’s] conclusions go into detail over the various inconsistencies in this spiral, which can result in cell failure. It’s important that the edges of the spiral be straight and that there is no electrode overhang. Perhaps unsurprisingly, they find that cheap no-name cells are poorly constructed and more likely to fail, but it’s also interesting to note that these low-quality cells also have fewer layers in their spiral.

We hope that none of you see more of the inside of a cell in real life than you have to, as they’re best left alone, but this report certainly sheds some light as to what’s going on inside a cell. Of course, even the best cells can still be dangerous without protection.

Build Your Own 6K Camera

[Curious Scientist] has been working with some image sensors. The latest project around it is a 6K camera. Of course, the sensor gives you a lot of it, but it also requires some off-the-shelf parts and, of course, some 3D printed components.

An off-the-shelf part of a case provides a reliable C mount. There’s also an IR filter in a 3D-printed bracket.

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Fnirsi IPS3608: A Bench Power Supply With Serious Flaws

Fnirsi is one of those brands that seem to pop up more and more often, usually for portable oscilloscopes and kin. Their IPS3608 bench power supply is a bit of a departure from that, offering a mains-powered PSU that can deliver up to 36 VDC and 8 A in a fairly compact, metal enclosure. Recently [Joftec] purchased one of these units in order to review it and ended up finding a few worrying flaws in the process.

One of the claims made on the product page is that it is ‘much more intelligent than traditional power supplies’, which is quite something to start off with. The visual impression of this PSU is that it’s somewhat compromised already, with no earth point on the front next to the positive and negative banana plug points, along with a tilting screen that has trouble staying put. The USB-C and -A ports on the front support USB-PD 3.0 and a range of fast charge protocols

The ‘intelligence’ claim seems to come mostly from the rather extensive user interface, including a graphing function. Where things begin to fall apart is when the unit locks up during load testing presumably due to an overheating event. After hooking up an oscilloscope, the ripple at 1 VDC was determined to be about 200 mV peak-to-peak at 91 kHz. Ripple increased at higher voltages, belying the ’10 mV ultra-low ripple’ claim.

A quick teardown revealed the cause for the most egregious flaw of the unit struggling to maintain even 144 Watt output: a very undersized heatsink on the SMPS board. The retention issues with the tilting issue seemed to be due to a design choice that prevents the screen from rotating without breaking plastic. While this latter issue could be fixed, the buggy firmware and high ripple on the DC output make this €124 ‘285 Watt’ into a hard pass.

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Retro X86 With 486Tang

Tang FPGA boards are affordable, and [nand2mario] has been trying to get an x86 core running on one for a while. Looks like it finally worked out, as there is an early version of the ao486 design on a Tang FPGA board using a Gowin device. That core’s available on the MiSTer platform, which emulates games using an Altera Cyclone device.

Of course, porting something substantial between FPGA architectures is not trivial. In addition, [nand2mario] made some changes. The original core uses DDR3 memory, but for the Tang and the 486, SDRAM makes more sense. The only problem is that the Tang’s SDRAM is 16 bits wide, which would imply you need two cycles per 32-bit access. To mitigate this, the memory system runs at twice the main clock frequency. Of course, that’s kind of double data rate, but not in the same way as DDR memory.

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6502 Puts On An SDR Hat

The legendary 6502 microprocessor recently turned 50 years old, and to celebrate this venerable chip which brought affordable computing and video gaming to the masses [AndersBNielsen] decided to put one to work doing something well outside its comfort zone. Called the PhaseLoom, this project uses a few other components to bring the world of software-defined radio (SDR) to this antique platform.

The PhaseLoom is built around an Si5351 clock generator chip, which is configurable over I2C. This chip is what creates the phase-locked loop (PLL) for the radio. The rest of the components, including antenna connectors and various filters, are in an Arduino-compatible form factor that let it work as a shield or hat for the 65uino platform, an Arduino-form-factor 6502 board. The current version [Anders] has been working on is dialed in to the 40-meter ham band, with some buttons on the PCB that allow the user to tune around within that band. He reports that it’s a little bit rough around the edges and somewhat noisy, but the fact that the 6502 is working as an SDR at all is impressive on its own.

For those looking to build their own, all of the schematics and code are available on the project’s GitHub page. [Anders] has some future improvements in the pipe for this project as well, noting that with slightly better filters and improved software even more SDR goodness can be squeezed out of this microprocessor. If you’re looking to experiment with SDR using something a little bit more modern, though, this 10-band multi-mode SDR based on the Teensy microcontroller gets a lot done without breaking the bank.

 

 

A 65f02 and 65c02

65F02 Is An FPGA 6502 With A Need For Speed

Does the in 65F02 “F” stand for “fast” or “FPGA”? [Jurgen] doesn’t know, but his drop-in replacement board for the 6502 and 65c02 is out there and open source, whatever you want it to stand for.

The “f” could easily be both, since at 100 MHz, the 65f02 is blazing fast by 6502 standards–literally 100 times the speed of the first chips from MOS. That speed comes from the use of a Spartan 6 FPGA core to implement the 6502 logic; making the “f” stand for “FPGA” makes sense, given that the CMOS version of the chip was dubbed the 65c02. The 65f02 is a tiny PCB containing the FPGA and all associated hardware that shares the footprint of a DIP-40 package, making it a drop-in replacement. A really fast drop-in replacement.

You might be thinking that that’s insane, and that (for example) the memory on an Apple ][ could never run at 100 MHz and so you won’t get the gains. This is both true, and accounted for: the 65F02 has an internal RAM “cache” that it mirrors to external memory at a rate the bus can handle. When memory addresses known to interact with peripherals change, the 65f02 slows down to match for “real time” operations.

The USB adapter board for programming is a great touch.

Because of this the memory map of the external machine matters; [Jurgen] has tested the Commodore PET and Apple ][, along with a plethora of German chess computers, but, alas, this chip is not currently compatible with the Commodore 64, Atari 400/800 or BBC Micro (or at least not tested). The project is open source, however, so you might be able to help [Jurgen] change that.

We admit this project isn’t totally new– indeed, it looks like [Jurgen]’s last update was in 2024– but a fast 6502 is just as obsolete today as it was when [Jurgen] started work in 2020. That’s why when [Stephen Walters] sent us the tip (via electronics-lab), we just had to cover it, especially considering the 6502’s golden jubilee.

We also recently featured a 32-bit version of the venerable chip that may be of interest, also on FPGA.