The history of aviation is full of notable X-Planes, a number of which heralded in new generations of flight. The Bell X-1 became the first aircraft to break the speed of sound during level flight in 1947 with the legendary Charles “Chuck” Yeager at the controls. A few years later the X-2 would push man up to Mach 3, refining our understanding of supersonic flight. In the 1960’s, the North American built X-15 would not only take us to the edge of space, but set a world speed record which remains unbroken.
Compared to the heady post-war days when it seemed the sky was quite literally the limit, X-Planes in the modern era have become more utilitarian in nature. They are often proposed but never built, and if they do get built, the trend has been towards unmanned subscale vehicles due to their lower cost and risk. The few full-scale piloted X-Planes of the 21st century have largely been prototypes for new military fighter jets rather than scientific research aircraft.
But thanks to a commitment from NASA, the Lockheed Martin X-59 might finally break that trend and become another historic vehicle worthy of the X-Plane lineage. Construction has already begun on the X-59, and the program has recently passed a rigorous design and timeline overview by NASA officials which confirmed the agency’s intent to financially and logistically support the development of the aircraft through their Low Boom Flight Demonstrator initiative. If successful, the X-59 will not only help refine the technology for the next generation of commercial supersonic aircraft, but potentially help change the laws which have prevented such aircraft from operating over land in the United States since 1973.
Continue reading “Shushing Sonic Booms: NASA’s Supersonic X-Plane To Take Flight In 2021”
One of the ways people use FPGAs is to have part of the FPGA fabric hold a CPU. That makes sense because CPUs are good at some jobs that are hard to do with an FPGA, and vice versa. Now that the RISC-V architecture is available it makes sense that it can be used as an FPGA-based CPU. [Clifford Wolf] created PicoSOC — a RISC-V CPU made to work as a SOC or System on Chip with a Lattice 8K evaluation board. [Mattvenn] ported that over to a TinyFPGA board that also contains a Lattice FPGA and shows an example of interfacing it with a WS2812 intelligent LED peripheral. You can see a video about the project, below.
True to the open source nature of the RISC-V, the project uses the open source Icestorm toolchain which we’ve talked about many times before. [Matt] thoughtfully provided the firmware precompiled so you don’t have to install gcc for the RISC-V unless you want to write you own software. Which, of course, you will.
Continue reading “RISC-V CPU Gets A Peripheral”
A lot can be done with simple motors and linear motion when they are mated to the right mechanical design and control systems. Teaching these principles is the goal behind the LCMT (Low Cost Mechatronics Trainer) which is intended primarily as an educational tool. The LCMT takes a “learn by doing” approach to teach a variety of principles by creating a system that takes a cup from a hopper, fills it with candy from a dispenser, then sorts the cups based on color, all done by using the proper combinations of relatively simple systems.
The Low Cost Mechatronics Trainer can be built for under $1,000 and is the wonderful work of a team from the Anne Arundel Community College in Maryland, USA. The LCMT is clearly no one-off project; there are complete CAD files and build documentation on the site, as well as a complete lab guide for educators.
A demo video of the assembled system is embedded below, with a walkthrough done by [Tim Callinan]. It’s worth a watch to see how cleanly designed the system is, and the visual learners among you may learn a thing or two just by watching the system go through its motions.
Continue reading “Watch The Low-Cost Mechatronics Lab Dispense Candy, Sort Cups”