IBM’s 1969 Educational Computing

IBM got their PCs and PS/2 computers into schools in the 1980s and 1990s. We fondly remember educational games like Super Solvers: Treasure Mountain. However, IBM had been trying to get into the educational market long before the PC. In 1969, the IBM Schools Computer System Unit was developed. Though it never reached commercial release, ten were made, and they were deployed to pilot schools. One remained in use for almost a decade! And now, there’s a new one — well, a replica of IBM’s experimental school computer by [Menadue], at least. You can check it out in the video below.

The internals were based somewhat on the IBM System/360’s technology. Interestingly, it used a touch-sensitive keypad instead of a traditional keyboard. From what we’ve read, it seems this system had a lot of firsts: the first system to use a domestic TV as an output device, the first system to use a cassette deck as a storage medium, and the first purpose-built educational computer. It was developed at IBM Hursley in the UK and used magnetic core memory. It used BCD for numerical display instead of hexadecimal or octal, with floating point numbers as a basic type. It also used 32-bit registers, though they stored BCD digits and not binary. In short, this thing was way ahead of its time.

Continue reading “IBM’s 1969 Educational Computing”

Mainframe Chip Has 360MB Of On-Chip Cache

It is hard to imagine what a mainframe or supercomputer can do when we all have what amounts to supercomputers on our desks. But if you look at something like IBM’s mainframe Telum chip, you’ll get some ideas. The Telum II has “only” eight cores, but they run at 5.5 GHz. Unimpressed? It also has 360 MB of on-chip cache and I/O and AI accelerators. A mainframe might use 32 of these chips, by the way.

[Clamchowder] explains in the post how the cache has a unique architecture. There are actually ten 36 MB L2 caches on the chip. There are eight caches, one for each core, plus one for the I/O accelerator, and another one that is uncommitted.

A typical CPU will have a shared L3 cache, but with so much L2 cache, IBM went a different direction. As [Clamchowder] explains, the chip reuses the L2 capacity to form a virtual L3 cache. Each cache has a saturation metric and when one cache gets full, some of its data goes to a less saturated cache block.

Remember the uncommitted cache block? It always has the lowest saturation metric so, typically, unless the same data happens to be in another cache, it gets moved to the spare block.

There’s more to it than that — read the original post for more details. You’ll even read speculation about how IBM managed a virtual L4 cache, across CPUs.

Cache has been a security bane lately on desktop CPUs. But done right, it is good for performance.

A Nibble Of Core Memory, In An SAO

Core memory, magnetized memory using tiny magnetic rings suspended on a grid of wires, is now more than five decades obsolete, yet it exerts a fascination for hardware hackers still. Not least [Andy Geppert], who’s made a nibble, four bits of it, complete with interactive LED illumination to show state. Best of all, it’s on a badge Simple Add-On (SAO) for fun and games at your next hacker con.

Aside from it being a fun project, perhaps the most interesting part comes in the GitHub repository, where can be found the schematic for the device. He’s built all the drive and sense circuitry himself rather than finding an old-stock core memory driver chip, which gives those of us who’ve never worked with this stuff the chance to understand how it works. Beyond that it takes input from the Stemma or SAO ports to a GPIO expander, which provides all the lines necessary to drive it all.

To show it in action he’s posted a video which we’ve placed below. If you’re hungry for more, it’s not [Andy]’s first outing into core memory.

Continue reading “A Nibble Of Core Memory, In An SAO”

An adorable mini rack for NUCs, plus a 5-port switch.

A Mini NUC Rack For Your Desktop

We (well, some of us) are complete suckers for things that are both much smaller and much larger than life. And if that thing actually does what its supposed to? Squee! So naturally, we rushed to bring you news of this mini NUC rack designed by [Jeremy Weatherford].

Inspiration comes from a lot of places, often times from stuff that lives on your desk. [Jeremy] had a pile of NUCs and thought they resembled a mini rack already, so why not build them one to live in? It was the perfect excuse to learn CAD, so off [Jeremy] went. Although this is a mini rack, the parts were too big to print. Another opportunity presented itself, and [Jeremy] tried out an online service to get the acrylic cut.

Assembly may have been fiddly with super glue all over the nice black acrylic, but [Jeremy] learned an important tip: excess glue can be removed with vegetable oil. Once it was built, he decided to make it into a control system lab and even found a perfect little five-port switch to top it off. The logo plate, of course, is the icing on this cake.

If you prefer your tower of mini-computers to be extruded, we covered a clever design from [Jay Doscher] back in May.

IBM’s Latest Quantum Supercomputer Idea: The Hybrid Classical-Quantum System

Although quantum processors exist today, they are still a long way off from becoming practical replacements for classical computers. This is due to many practical considerations, not the least of which are factors such as the need for cryogenic cooling and external noise affecting the system necessitating a level of error-correction which does not exist yet. To somewhat work around these limitations, IBM has now pitched the idea of a hybrid quantum-classical computer (marketed as ‘quantum-centric supercomputing’), which as the name suggests combines the strengths of both to create a classical system with what is effectively a quantum co-processor.

IBM readily admits that nobody has yet demonstrated quantum advantage, i.e. that a quantum computer is actually better at tasks than a classical computer, but they figure that by aiming for quantum utility (i.e. co-processor level), it could conceivably accelerate certain tasks for a classical computer much like how a graphics processing unit (GPU) is used to offload everything from rendering graphics to massively parallel computing tasks courtesy of its beefy vector processing capacity. IBM’s System Two is purported to demonstrate this when it releases.

What the outcome here will be is hard to say, as the referenced 2023 quantum utility demonstration paper involving an Ising model was repeatedly destroyed by classical computers and even trolled by a Commodore 64-based version. Thus, at the very least IBM’s new quantum utility focus ought to keep providing us with more popcorn moments like those, and maybe a usable quantum system will roll out by the 2030s if IBM’s projected timeline holds up.

PCB data sheet of a custom 4-bit microcontroller

Building A Microcontroller From Scratch: The B4 Thinker Project

[Marius Taciuc’s] latest endeavor, the B4 Thinker, offers a captivating glimpse into microcontroller architecture through a modular approach. This proof-of-concept project is meticulously documented, with a detailed, step-by-step guide to each component and its function.

Launched in 2014, the B4 Thinker project began with the ambitious goal of building a microcontroller from scratch. The resulting design features a modular CPU architecture, including a base motherboard that can be expanded with various functional modules, such as an 8-LED port card. This setup enables practical experimentation, such as writing simple assembly programs to control dynamic light patterns. Each instruction within this system requires four clock pulses to execute, and the modular design allows for ongoing development and troubleshooting.

Continue reading “Building A Microcontroller From Scratch: The B4 Thinker Project”

A man in glasses and a black sweatshirt sits in front of an orange and black computer screen just below eye level at the table in front of him. His keyboard sits on the table below. He appears to be in a park as there are trees and grass in the background.

Flying Lotus Is A Framework-Powered Portable All-in-One Computer

One of the things that we love about the modern era of computing is the increasing ease by which you can roll your own custom computer, as seen with the cyberdeck phenomenon. The Flying Lotus is another awesome build in this vein.

Built around the Framework ecosystem, this device was built to suit the very specific use case of its designer, [Carlos Aldana]. He found himself traveling a lot and that the ergonomics of a laptop left a lot to be desired, especially when in the air. Add to it the fact that he has trouble typing on typical laptop keyboards for any length of time, and you can see how an ergonomic keyboard plus a laptop just doesn’t really work on a tray table.

The Flying Lotus takes the screen, modular ports, and mainboard of a Framework laptop and puts them into a single computing block that can be hung from the clever tabs at the top or mounted on a stand that puts the screen at a more ergonomically ideal height from the work surface. [Aldana] describes it as an “iMac that’s portable.” Since it doesn’t have an integrated keyboard, you can run it with whatever keyboard you like from super duper ergo to a teeny game controller sized unit.

We’ve talked about why we like Framework so much before, and if you’d like another take on a modern portable computer, how about this portable Mac mini?

Continue reading “Flying Lotus Is A Framework-Powered Portable All-in-One Computer”