Simulating VHDL Of An AVR8 Soft Processor

Okay, now we’re beginning to feel a bit like [Alice]. This tutorial shows you how to simulate VHDL code. This code is intended to run on an FPGA and includes a software-only version of the AVR 8-bit microcontroller core. Essentially, you’ll simulate VHDL code that simulates AVR hardware. Wrap your mind around that!

The code isĀ intended to run on a Papilio Field Programmable Gate Array development board. We saw an early version of this board running the AVR8 core about a year ago. However, you don’t need to have any hardware to follow along and recreate this simulation yourself. It might be a great way to get your feet wet with FPGA programming before making that first hardware buy. Five different screencasts take you through the process of getting the AVR8 code, using an altered Arduino IDE for it, setting up a free version of Xilinx ISE to run the simulation, then setting it free and interpreting the data that the simulator spits out the other end.

Gameduino

Gameduino is an FPGA based sound and graphics adapter for microcontrollers. Laid out as an Arduino shield, all it really takes is a microcontroller with SPI and some code to send commands to the board which lets you toggle registers, handle memory, and drawing functions.

Once the data gets there, it is greeted by a Xilinx FPGA which puts out a 800×600 72Hz SVGA sync signal, large 512×512 pixel character scrolling backgrounds, piles of 16×16 (up to 256 color) sprites, each with per pixel transparency, rotation, flip, and if that was not enough a 12 bit frequency synth that can do 16 independent voices.

All the resources to make one of these is listed on the site under the Making a Gameduino link, but if youre interested in getting a made board there is also a kickstarter page available. There are other ways to squeeze video out of micro controllers from the basic like hackvision to AVGA or even Lucidscience AVR VGA v2, and tons of propeller projects, but this one being stand alone and portable, has a certain appeal.

Join us after the break for a quick video.

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What Development Board To Use? (Part Two)

We asked for responses to our last Development Board post, and you all followed through. We got comments, forum posts, and emails filled with your opinions. Like last time, there is no way we could cover every board, so here are a few more that seemed to be popular crowd choices. Feel free to keep sending us your favorite boards, we may end up featuring them at a later date!

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Falling Sand Game On An FPGA

This falling sand game runs on a field-programmable gate array. The Altera Cyclone II resides at the heart of that development board, running the game which was written in Verilog. [Skyler Schneider] modeled his project after a Java version of the game called Pyro Sand Game. He treats each pixel of the 640×480 VGA screen as its own cell, following a set of rules to change the cells around it. This is very similar to Conway’s Game of Life, except that there are different categories of cells that behave uniquely (oil, water, plant, fire, etc.) and gravity is a key factor. Of particular interest to us were the rules for each cell, and the method [Skyler] used to feed and sync the VGA output. After the break you can see his demonstration videos, which walk through all of the features including the Troll button.

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Game Boy VGA Using An FPGA

[ViDAR] was looking for a project to keep him occupied and settled on creating a VGA converter for his Game Boy. He had some difficulty finding pinouts for the LCD and CPU but working with what was known, and an oscilloscope, he found the necessary signal. Tap into just a few lines using those thin blue wires; Vsync, Hsync, clock, and two data pins. From there a development board with anĀ Altera Cyclone II field-programmable gate array takes care of the heavy lifting. The board already has hardware for a VGA connection so it was just a matter of processing the incoming signals into the VGA standard. His demo video is embedded after the page break.

Want a dedicated solution? Check out this Game Boy video adapter inside a VHS cassette.

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J1: A Small, Fast, CPU Core For FPGA

[James Bowman] of the Willow Garage published a paper on his J1 CPU core for field-programmable gate arrays. This was originally developed and used for the Ethernet cameras on the PR2 (you know, that incredibly expensive beer delivery system?) robot. It uses a 16-bit von Neumann architecture and lacks several processor features you’d expect a CPU to have such as interrupts, multiply and divide, a condition register, and a carry flag. None-the-less, its compact at just 200 lines of Verilog and it can run at 80 MHz. [James] compares the J1 to three different FPGA CPU Cores commonly used and discusses how the system is built in his 4-page paper that has the details you’re interested in but won’t take all day to dig through.

V4Z80P: The 8-bit Laptop

[Phil] over at Retroleum has cobbled together a clean, well put together laptop based entirely around a Zilog Z80 microprocessor and a pair of Spartan II FPGAs. These FPGAs allow him to reduce the number of devices on his board, and therefore cut his production cost as well as device size. He even managed to integrate a salvaged PSOne screen. The laptop comes complete with [Phil]’s own Homebrew OS as well as a great graphical vector based demo.

Sure he’s updated the project in recent years to shrink the board, speeding up the Z80, and increasing the peripheral speed and functionality, but we’re suckers here for a total package hack. Seriously though, check out the newest version of the device as well as the backlog that shows the project growing over time.

Thanks to [Steth] for the heads up.