cpu

107 Articles

Software Defined… CPU?

July 19, 2021 by 45 Comments

Everything is better when you can program it, right? We have software-defined radios, software-defined networks, and software-defined storage. Now a company called Ascenium wants to create a software-defined CPU. They’ve raised millions of dollars to bring the product to market.

The materials are a bit hazy, but it sounds as though the idea is to have CPU resources available and let the compiler manage and schedule those resources without using a full instruction set. A system called Aptos lets the compiler orchestrate those resources.

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One Bit CPU Runs At A Blistering 60Hz

March 31, 2021 by 20 Comments

If you really think hard about it, a CPU is just a very general-purpose state machine. Well, most CPUs are, anyway. The MC14500 is a one-bit computer that has only 16 instructions and was meant to serve in simple tasks where a big CPU wouldn’t work for space, power, or budget reasons. However, [Laughton] took the idea one step further and created a single-bit computer with no real instructions to control a printing press. The finished machine uses a clever format in an EEPROM to drive an endless program.

Honestly, we’d say this is more of a state machine, but we like the idea of it being a minimal CPU which is also true. The design uses the EEPROM in an odd way. Each CPU address really addresses a block of four bytes. The byte that gets processed depends on the current phase and the status of the one-bit flag register.

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Hackaday Links: December 27, 2020

December 27, 2020 by 26 Comments

We’re always pleased to see one of our community’s projects succeed, and we celebrate that success in whatever what it comes. But seeing a company launched to commercialize an idea that started as a Hackaday.io project and a Hackaday Prize entry is especially gratifying. So we were pleased as punch to see that MAKESafe Tools has managed to bring the idea of add-on machine tool braking to market. We’d love to add this to several tools in our shop. Honestly, of all the terrifying ways machine tools can slice, dice, and shred human flesh asunder, we always considered the lowly bench grinder fairly low-risk — and then we had a chance to “Shake Hands with Danger.”

Another great thing about the Hackaday community is the way we all try to keep each other up to speed on changes and news that affects even our smallest niches. Just last week Tom Nardi covered a project using the venerable TI eZ430-Chronos smartwatch as a makeshift medical alert bracelet for a family member. It’s a great application for the proto-smartwatch, but one eagle-eyed commenter helpfully pointed out that TI is shutting down their processors wiki in just a couple of weeks. The banner at the top of each page warns that the wiki is not read-only and that any files needed should be downloaded by January 15. Also helpfully, subsequent comments include instructions to download the entire wiki and a torrent link to the archive. It’s always sad to see a platform lose support, especially one that has gained a nice following, but it’s heartening to see the community pull together to continue to support each other like this.

We came across an interesting article this week that’s was a fascinating glimpse into how economic forces shape  and drive technological process, and vice versa. It turns out that some of the hottest real estate commodities these days are the plots of land occupied by AM radio stations serving metropolitan markets. It’s no secret that terrestrial radio in general, and AM radio in particular, are growing increasingly moribund, and the infrastructure needed to keep them on the air is getting harder and harder to justify. Chief among these are the large tracts of land devoted to antenna farms, which are often located in suburban and exurban areas near major cities. They’re tempting targets for developers looking to plunk down the physical infrastructure needed to support “New Economy” players like Amazon, which continue to build vast automated warehouses in areas that are handy to large customer bases. It’s a bit sad to watch a once mighty industry unravel and be sold off like this, but such is the nature of progress.

And finally, you may recall a Links article mention a few weeks back about a teardown of a super-sized IBM processor module. A quarter-million dollar relic of the 1990s, the huge System/390 module was an engineering masterpiece that met an unfortunate end at the hands of EEVblog’s Dave Jones. As a follow-up, Dave teamed up with fellow YouTuber CPU Galaxy to take a less-destructive tour of the module using X-ray analysis. The level of engineering needed for a 64-layer ceramic backplane is astonishing, and Dave’s play-by-play is pretty entertaining too. As a bonus, CPU Galaxy has some really interesting stuff; his place is basically a museum of vintage tech, and he just earned a new sub.

A Breadboard Block For 8-Bit CPUs

October 12, 2020 by 21 Comments

Breadboard CPUs are a fantastic learning experience and require serious dedication and patience. Occasionally, CPU builders eschew their breadboards and fab their design onto a PCB. But this takes away the flexibility and some of the opportunity for learning that breadboard CPUs offer. [c0pperdragon] was doing the same sort of repetitive wiring from project to project as most 8-bit breadboard CPUs use memory, a bus, an IO controller, ROM, and a few other passive components.

Taking a compromise approach, [c0pperdragon] built a PCB that can be used as a building block in his custom CPUs which they have titled “ByteMachine”. A single row of 34 pins offer power, clock, reset, 19 address bus lines, 8 data bus lines, and a ROM selector. This means that the CPUs can fit on a single breadboard and can run faster as the impedance of the breadboard has less effect on the circuit. With 512 KB of RAM and 512 KB of ROM, in a ZIF socket for easy reprogramming, ByteMachine has plenty of space.

One drawback is the lack of IO. There is no dedicated address space as this would require decoding logic between the RAM and the CPU. [C0pperdragon] added a simple 8-bit output register provided by a 74-series logic IC. The data is displayed on 8 red LEDs and can be accessed via pins. Input is accomplished in a similar way with just 8 bits of digital input provided.

[C0pperdragon] has built the 65C02, 65C816,  Z84C00, and the i8088 with the ByteMachine. Each was documented with incredible schematics, pictures, and test programs on GitHub. Next time you’re looking to build a CPU on a breadboard, maybe start with a ByteMachine. In some ways, it might improve your learning experience as it makes the incredible mass of wires we’ve seen on other projects a tad more manageable.

Thanks [Reinhard Grafl] for sending this one in!

Indian RISC-V Chip Is Team’s Third Successful Chip

October 3, 2020 by 20 Comments

There was a time when creating a new IC was a very expensive proposition. While it still isn’t pocket change, custom chips are within reach of sophisticated experimenters and groups. As evidence, look at the Moushik CPU from the SHAKTI group. This is the group’s third successful tapeout and is an open source RISC-V system on chip.

The chip uses a 180 nm process and has 103 I/O pins. The CPU runs around 100 MHz and the system includes an SDRAM controller, analog to digital conversion, and the usual peripherals. The roughly 25 square mm die houses almost 650 thousand gates.

This is the same group that built a home-grown chip based on RISC-V in 2018 and is associated with the Indian Institute of Technology Madras. We aren’t clear if everything you’d need to duplicate the design is in the git repository, but since the project is open source, we presume it is.

If you think about it, radios went from highly-specialized equipment to a near-disposable consumer item. So did calculators and computers. Developing with FPGAs is cheaper and easier every year. At this rate it’s not unreasonable to think It won’t be long before creating a custom chip will be as simple as ordering a PCB — something else that used to be a big hairy deal.

Of course, we see FPGA-based RISC-V often enough. While we admire [Sam Zeloof’s] work, we don’t think he’s packing 650k gates into that size. Not yet, anyway.

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Die Lapping For Better CPU Performance

July 21, 2020 by 59 Comments

CPUs generate their heat in the silicon die that does all those wonderful calculations which make our computers work. But silicon conducts heat fairly poorly, so the thinner your CPU die, the better it will conduct heat out to the heatsink. This theoretically promises better cooling and thus more scope for performance. Thus, it follows that some overclockers have taken to lapping down their CPU dies to try and make a performance gain.

It’s not a simple process, as the team at [Linus Tech Tips] found out. First, the CPU must be decapped, which on the Intel chip in question requires heating to release the intermediate heat spreader. A special jig is also required to do the job accurately. Once the bare CPU is cleaned of all residual glue and heat compounds, it can then be delicately lapped with a second jig designed to avoid over-sanding the CPU.

After much delicate disassembly, lapping, and reassembly, the CPU appears to drop 3-4 degrees C in benchmarks. In overclocking terms, that’s not a whole lot. While the process is risky and complicated for little gain, the underlying premise has merit – Intel thinned things out in later chips to make minor gains themselves. Video after the break.

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SoftCore CPU Comparison

July 12, 2020 by 19 Comments

Monty Python once did a sketch where people tried to summarize Proust in fifteen seconds. Although summarizing eight FPGA-based CPUs is almost as daunting, [jaeblog] does a nice job of giving a quick sketch of how the CPUs work with the Xilinx Vivado toolchain and the Digilent Arty board.

The eight CPUs are:   VexRiscv, LEON3, PicoRV32, Neo430, ZPU, Microwatt, S1 Core, and Swerv EH1.

The comparison criteria were very practical: A C compiler (gcc or llvm) for each CPU and no CPUs that were tied to a particular FPGA. Two of the CPUs didn’t fit on the Arty board, so their comparisons are a bit more theoretical.  There were other considerations such as speed, documentation, debugging support, and others.

It was interesting to see the various CPUs ranging from some very mature processors to some new kids on the block, and while the evaluations were somewhat subjective, they seemed fair and representative of the things you’d look for yourself. You can also get the test code if you want to try things for yourself.

The winner? The post identifies three CPUs that were probably the top choices, although none were just perfect. Of course, your experience may vary.

If you want an easy introduction to adding things to a soft CPU, this RISC-V project is approachable. Or if you prefer SPARC, check out this project.