Supercon 2023: Exploring The Elegance Of The Voja4

May 20, 2024 by Tom Nardi 7 Comments

When you design an electronic badge, the goal is to make a device that’s interesting and has enough depth to keep your attendees engaged for the duration of the con but not so complicated that they can’t become proficient with it before they have to head home. It’s a difficult balance to nail down, and truth be told, not every Supercon badge has stuck the landing in this regard.

But if you’ve really done things right, you’ll create a piece of hardware that manages to outlive the event it was designed for. A badge that attendees continue to explore for months, and potentially even years, afterward. If the talk “Inside the Voja4” by Nathan Jones is any indication, we think it’s safe to say that goal was achieved with the Supercon 2022 badge.

During this forty-minute presentation, Nathan discusses what makes the 4-bit badge so fascinating from a technical standpoint and how it could theoretically be expanded to accomplish far more complex tasks than one might assume at first glance.

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FPGA Retrocomputer: Return To Moncky

September 26, 2021 by Bryan Cockfield 5 Comments

Part of the reason that retrocomputers are still so popular despite their obsolescence is that it’s possible to understand the entire inner workings of a computer like this, from the transistors all the way up to the software. Comparatively, it will likely be a long time (if ever) before anyone is building a modern computer from discrete components. To illustrate this point, plenty of 8-bit computers are available to either restore from original 80s hardware or to build from kits. And if you’d like to get even deeper into the weeds you can design your own computer including the instruction set completely from the ground up using an FPGA.

This project, called the Moncky project, is a step above the usual 8-bit computer builds as it is actually a 16-bit computer. It is built around an Arty Spartan-7 FPGA dev board running around 20 MHz and has access to 2 x 128 kB dual-port RAM for memory. To access the outside world there is a VGA output, PS/2 capability, SPI, and uses an SD card as a hard drive. This project really shines in the software, though, as the project creator [Kris Demuynck] builds everything from scratch in order to illustrate how everything works for educational purposes, and is currently working on implementing a C compiler to make programming the computer easier.

All of the project files, as well as all of the code, are available on the project’s GitHub page if you’d like to follow along or build on this homebrew 16-bit computer. It’s actually the third iteration of this computer, with the Moncky-1 and Moncky-2 being used to develop the more basic building blocks for this computer. While it’s not the first 16-bit computer we’ve seen implemented on an FPGA, it is one of the few that builds its own RISC instruction set and associated software rather than cloning a known existing processor. We’ve also seen some interesting x86 implementations on an FPGA as well.

Thanks to [koen-ieee] for the tip!

Software Defined… CPU?

July 19, 2021 by Al Williams 45 Comments

Everything is better when you can program it, right? We have software-defined radios, software-defined networks, and software-defined storage. Now a company called Ascenium wants to create a software-defined CPU. They’ve raised millions of dollars to bring the product to market.

The materials are a bit hazy, but it sounds as though the idea is to have CPU resources available and let the compiler manage and schedule those resources without using a full instruction set. A system called Aptos lets the compiler orchestrate those resources.

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Instruction Set Hack For Protected Memory Access

April 27, 2020 by Inderpreet Singh 7 Comments

The nRF51 Series SoCs is a family of low power Bluetooth chips from Nordic Semiconductor that is based on ARM Cortex cores. The nRF51822 has the Cortex M0 core and is used in a lot of products. [Loren] has written a blog post in which he claims to be able to circumvent read back protection on the chip, thus giving access to the ROM, RAM and registers as well as allow for interactive debugging sessions.

The hack stems from the fact that the Serial Wire Debug or SWD interface cannot be completely disabled on these chips even if the Memory Protection Unit prevents access to any memory regions directly. The second key piece is the fact that CPU can fetch stuff from the code memory. Combined with the SWD super powers to make changes to the registers themselves, this can be a powerful tool.

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Variable Instruction Computing: What Is Old Is New Again

February 19, 2016 by Brian Benchoff 63 Comments

Every twenty to twenty-five years, trends and fads start reappearing. 2016 is shaping up to be a repeat of 1992; the X-files is back on the air, and a three-way presidential election is a possibility. Star Trek is coming back, again. Roll these observations back another twenty-five years, and you have The Outer Limits, Star Trek, and riots at the DNC convention in Chicago.

History repeating itself is not the exclusive domain of politics and popular culture. It happens with tech, too: the cloud is just an extension of thin clients which are an extension of time-sharing. Everything old is new again.

For the last few years, Soft Machines, a fabless semiconductor company running in stealth mode, released the first preview for an entirely new processor architecture. This new architecture, VISC, offers higher performance per Watt than anything available on the market. If you’ve been paying attention for the last decade or so, the future of computing isn’t 200-Watt space heaters that also double as powerful CPUs. The future is low power machines that are good enough to run Facebook or run some JavaScript. With servers, performance per Watt is possibly the most important metric. How will Soft Machines upend the semiconductor market with new processors and new architectures? If you know your history, it shouldn’t be a surprise.

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Build Your Own CPU? That’s The Easy Part!

July 31, 2015 by Al Williams 38 Comments

You want to build your own CPU? That’s great fun, but you might find it isn’t as hard as you think. I’ve done several CPUs over the years, and there’s no shortage of other custom CPUs out there ranging from pretty serious attempts to computers made out of discrete chips to computers made with relays. Not to trivialize the attempt, but the real problem isn’t the CPU. It is the infrastructure.

What Kind of Infrastructure?

I suppose the holy grail would be to bootstrap your custom CPU into a full-blown Linux system. That’s a big enough job that I haven’t done it. Although you might be more productive than I am, you probably need a certain amount of sleep, and so you may want to consider if you can really get it all done in a reasonable time. Many custom CPUs, for example, don’t run interactive operating systems (or any operating system, for that matter). In extreme cases, custom CPUs don’t have any infrastructure and you program them in straight machine code.

Machine code is error prone so, you really need an assembler. If you are working on a big machine, you might even want a linker. Assembly language coding gets tedious after a while, so maybe you want a C compiler (or some other language). A debugger? What about an operating system?

Each one of those things is a pretty serious project all by itself (on top of the project of making a fairly capable CPU). Unless you have a lot of free time on your hands or a big team, you are going to have to consider how to hack some shortcuts.

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8-bit Logic Chip Computer Build

April 23, 2012 by Mike Szczys 6 Comments

[Kyle] has been hard at working building an 8-bit computer from the ground up. He’s using a set of logic IC’s for the various components, and some NVRAM chips to store the control words. What you see above is the roadmap for his instruction set. He’s just started writing them to the chips, making the job easier by building an Arduino-based programmer.

We’ve enjoyed watching [Quinn Dunki’s] progress with her ~~Z80~~ 6502-based PC build which started on a breadboard in much the same way but has come a long way since those humble beginnings. Recently we also looked in on a 4-bit computer that is using discrete components. But [Kyle’s] take on the challenge falls somewhere in between the two.

The gist of his design can be found in one of his earlier post. He’s got a ring counter which starts by clearing the address register. It then loads the NVRAM address of the next instruction which is then executed on the subsequent count. It seems the build still has some way to go so make sure to keep your eye out for updates.

[via Reddit]