How To Add UART To Your FPGA Projects

September 6, 2018 by 18 Comments

Being able to communicate between a host computer and a project is often a key requirement, and for FPGA projects that is easily done by adding a submodule like a UART. A Universal Asynchronous Receiver-Transmitter is the hardware that facilitates communications with a serial port, so you can send commands from a computer and get messages in return.

Last week I wrote about an example POV project that’s a good example for learn. It was both non-trivial and used the board’s features nicely. But it has the message hard coded into the Verilog which means you need to rebuild the FPGA every time you want to change it. Adding a UART will allow us to update that message.

The good news is the demo is open source, so I forked it on GitHub so you can follow along with my new demo. To illustrate how you can add a UART to this project I made this simple plan:

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Cheap FPGA Board Roundup

August 20, 2018 by 24 Comments

There’s never been a better time to get into using FPGAs. Nearly all vendors have some level of free software and while boards haven’t gotten as cheap as ones with microcontrollers, the prices are way down. [Joel Williams] was frustrated when his board of choice became unavailable, so he decided to compile data on as many cheap boards as he could.

[Joel] covers the major vendors like Intel and Altera. But he also includes information on Actel, Cypress, and Lattice. While the list probably isn’t comprehensive, it is a lot of information about many popular boards. The notes are helpful and point out oddities about the boards in many cases.

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Learn FPGA Fast With Hackaday’s FPGA Boot Camp

August 6, 2018 by 37 Comments

FPGAs have gone from being a niche product for people with big budgets to something that every electronics experimenter ought to have in their toolbox. I am always surprised at how many people I meet who tell me they are interested in using FPGAs but they haven’t started. If you’ve been looking for an easy way to get started with FPGAs, Hackaday’s FPGA boot camp is for you. There’s even a Hackaday.io chat in the group specifically for FPGA talk for questions and general discussion!

While it is true FPGAs aren’t for everything, when you need them you really need them. Using FPGAs you can build logic circuits — not software simulations, but real circuits — and reap major performance benefits compared to a CPU. For digital signal processing, neural networks, or computer vision applications, being able to do everything essentially in parallel is a great benefit. Sometimes you just need the raw speed of a few logic gates compared to a CPU plodding methodically through code. We expect to see a lot more FPGA activity now that Arduino is in the game.

These boot camps gather together some of the material you seen spread over many articles here before, plus new material to flesh it out. It’s designed for you to work through more like a training class than just some text to read. There’s plenty of screenshots and even animations to help you see what you are supposed to be doing. You’ll be able to work with simulations to see how the circuits we talk about work, make changes, and see the results. We’ll focus on Verilog — at least for now — as it is close to C and easier for people who know C to pick up. Still not convinced? Let’s run though the gist of the boot camp series.

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Another Introduction To FPGAs

March 1, 2018 by 33 Comments

FPGAs can have a steep learning curve, so getting started tutorials are a popular topic. Intel recently published a video titled “Basics of Programmable Logic: FPGA Architecture” and you can see it below. Of course, Intel bought Altera, so the material has a bit of Altera/Intel flavor to it, but the course is generic enough that the concepts will apply to just about any FPGA.

Of course, if you do want to use Quartus, there are quite a few follow-on courses, including the wonderfully named “Become a [sic] FPGA Designer in 4 Hours.” We’d really like to see a sequel titled “Become a Proficient FPGA Designer in 9 Months” but Google didn’t turn that one up.

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FPGA Clocks For Software Developers (or Anyone)

September 21, 2017 by 18 Comments

It used to be that designing hardware required schematics and designing software required code. Sure, a lot of people could jump back and forth, but it was clearly a different discipline. Today, a lot of substantial digital design occurs using a hardware description language (HDL) like Verilog or VHDL. These look like software, but as we’ve pointed out many times, it isn’t really the same. [Zipcpu] has a really clear blog post that explains how it is different and why.

[Zipcpu] notes something we’ve seen all too often on the web. Some neophytes will write sequential code using Verilog or VHDL as if it was a conventional programming language. Code like that may even simulate. However, the resulting hardware will — at best — be very inefficient and at worst will not even work.

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Compiling A $22 Logic Analyzer

December 13, 2016 by 26 Comments

On my way to this year’s Hackaday SuperConference I saw an article on EE Times about someone taking the $22 Lattice iCEstick and turning it into a logic analyzer complete with a Python app to display the waveforms. This jumped out as pretty cool to me given that there really isn’t a ton of RAM on the stick, basically none that isn’t contained in the FPGA itself.

[Jenny List] has also written about the this application as created by [Kevin Hubbard] of Black Mesa Labs and [Al Williams] has a great set of posts about using this same $22 evaluation board doing ground up Verilog design using open source tools. Even if you don’t end up using the stick as a logic analyzer over the long haul, it’ll be very easy to find many other projects where you can recompile to invent a new purpose for it.

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32C3: A Free And Open Source Verilog-to-Bitstream Flow For ICE40 FPGAs

December 29, 2015 by 10 Comments

[Clifford] presented a fully open-source toolchain for programming FPGAs. If you don’t think that this is an impressive piece of work, you don’t really understand FPGAs.

The toolchain, or “flow” as the FPGA kids like to call it, consists of three parts: Project IceStorm, a low-level tool that can build the bitstreams that flip individual bits inside the FPGA, Arachne-pnr, a place-and-route tool that turns a symbolic netlist into the physical stuff that IceStorm needs, and Yosys which synthesizes Verilog code into the netlists needed by Arachne. [Clifford] developed both IceStorm and Yosys, so he knows what he’s talking about.

What’s most impressive is that FPGAs aren’t the only target for this flow. Because it’s all open source and modifiable, it has also been used for designing custom ASICs, good to know when you’re in need of your own custom silicon. [Clifford]’s main focus in Yosys is on formal verification — making sure that the FPGA will behave as intended in the Verilog code. A fully open-source toolchain makes working on this task possible.

If you’ve been following along with [Al Williams]’s FPGA posts, either this introduction or his more recent intermediate series that are also based on the relatively cheap Lattice iCEStick development kit, this video is a must-watch. It’s a fantastic introduction to the cutting-edge in free FPGA tools.