FPGA Jacked Into Pinball Machine Masters High Scores

How do you preserve high scores in an old arcade cabinet when disconnecting the power? Is it possible to inject new high scores into a pinball machine? It was the b-plot of an episode of Seinfield, so it has to be worth doing, leading [matthew venn] down the rabbit hole of FPGAs and memory maps to create new high scores in a pinball machine.

The machine in question for this experiment is Doctor Who from Williams, which, despite being a Doctor Who pinball machine isn’t that great of a machine. Still, daleks. This machine is powered by a Motorola 68B09E running at 2MHz, with 8kB of RAM at address 0x0000. This RAM backed up with a few AA batteries, and luckily is in a DIP socket, allowing [matthew] to fab a board loaded up with an FPGA development board that goes between the CPU and RAM.

The basic technique for intercepting and writing a new high score for this pinball machine comes from the incredible [sprite_tm] who is tweeting high scores from a 1943 cabinet. The idea is simple: just have an FPGA look at one specific memory address, and send some data to a computer when the data at that address is updated. For the Doctor Who pinball machine, this is slightly harder than it sounds: the data isn’t stored in hex, but packed BCD. After a little bit of work, though, [matthew] was able to write new high scores from a Python script running on a laptop. All the code (and a few more details) are over on a Github

Extending arcade games by tapping into address and data lines isn’t something we see a lot of, but it has been done, most famously with the Church of Robotron. Here, a few MAME hacks turn a game of Robotron into a Church for the faithful to fully commit themselves to the savior of the world, due to arrive in 66 years and save the remaining humans from the robot apocalypse. This hack of a Doctor Who pinball machine goes beyond a modded version of MAME, and if we’re ever going to make a real chapel with a real game of Robotron, these are the techniques we’re going to use.

Three Part Deep Dive Explains Lattice ICE40 FPGA Details

It is no secret that we like the Lattice iCE40 FPGA. It has a cheap development board and an open source toolchain, so it is an easy way to get started developing low-cost, low-power FPGA designs. There are a few members of the family that have similar characteristics including the top-of-the-line UltraPlus. [Steve] from Lattice and [Michael Klopfer] from the University of California Irvine have a three-part video series that explain the architecture of the devices. Altogether, the videos are about an hour long and — of course — they use the official tools, not IceStorm. But it is still a great time investment if you have an iCE40 board and you want to understand what the chip has under the hood.

The first part is fairly short and talks a lot about applications. There’s also a nod to the hobbyist use of FPGAs. Keep in mind that the iCE40 FPGAs come in different sizes and variants, so don’t get excited when you see them mention a RISC-V — that isn’t going to fit in your iCEStick, that we know of. The iCEstick has a HX-1K onboard, which is the high-performance variant with 1,280 logic elements, as opposed to the low-power (LP) version.

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Learn Verilog In Your Browser

We are big fans of tools in the browser for education. You have a consistent environment maintained by someone else, you don’t have to install anything, and you can work from any computer you happen to find yourself. The HDLBits site has a great set of Verilog “exams” that would be a big help to anyone trying to learn or brush up on their Verilog skills.

The site offers a range of topics that go from the silly (output a constant 1 or 0) to full-blown state machines and testbenches. The site isn’t tutorial in nature, instead it offers a problem, an optional hint, and an editing window with some code already in place. You add your code and hit submit. Behind the scenes, the site runs Intel Quartus and Modelsim to test your work. It will either show you the results or tell you that you failed.

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Using An FPGA To Navigate China’s Railroads

If you’re headed over to mainland China as a tourist, it’s possible to get to most of the country by rail. China is huge though, about the same size as the United States and more than twice the size of the European Union. Traveling that much area isn’t particularly easy. There are over 300 train terminals in China, and finding the quickest route somewhere is not obvious at all. This is an engineering challenge waiting to be solve, and luckily some of the students at Cornell Engineering have taken a stab at efficiently navigating China’s rail system using an FPGA.

The FPGA runs an algorithm for finding the shortest route between two points, called Dijkstra’s algorithm. With so many nodes this can get cumbersome for a computer to calculate, but the parallel processing of a dedicated FPGA speeds up the process significantly. The FPGA also includes something called a “hard processor system“, or HPS. This is not a soft-core, but dedicated computing hardware in the form of an ARM Cortex-A9. Testing showed that utilizing both the HPS and the FPGA can speed up the computation by up to ten times over a microcontroller alone.

This project goes into extreme detail on the methodology and the background of the math and coding involved, and is definitely worth a read if you’re interested in FPGAs or traveling salesman-esque problems. FPGAs aren’t the only dedicated hardware you can use to solve these kinds of problems though, if you have a big enough backpack while you’re traveling around China you could also use a different kind of computer.

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Turning A Tiny FLIR Into An Action Cam With FPGAs

FLIR are making some really great miniature thermal cameras these days, designed for applications such as self-driving cars, and tools that help keep firefighters safe. That’s great and all, but these thermal cameras are so cool, you really just want to play with one. That’s what [greg] was thinking when he designed a PCB backpack that captures thermal images from a FLIR Boson and stores it on an SD card. It’s a thermal action cam, and an impressive bit of FPGA development, too.

The FLIR product in question is a Boson 640, an impressive little camera that records in 640×512 resolution, with a 60 Hz update rate. This one’s got the 95° field of view, giving it a very good specification in a very small footprint. This is a huge improvement over FLIR’s Tau camera, for which [greg] built a breakout board with Ethernet and DDR memory a few years ago. Once he found out about the Boson, he figured a backpack PCB for this camera would be possible and a great excuse to teach himself FPGAs with a hands-on project.

With an impressive ability to find the perfect part, [greg] sourced a Lattice iCE40 FPGA in an 8×8 mm package along with an 8 Mbit HyperRAM in a 6×8 package. This combination allows for all the chips to fit behind the Boson camera. Add in an microSD card slot and a few connectors and this breakout board is very close to being a commercial product, for whatever forward looking infrared needs you might have.

CORDIC Brings Math To FPGA Designs

We are always excited when we see [Hamster] post an FPGA project, because it is usually something good. His latest post doesn’t disappoint and shows how he uses the CORDIC algorithm to generate very precise sine and cosine waves in VHDL. CORDIC (Coordinate Rotation Digital Computer; sometimes known as Volder’s algorithm) is a standard way to compute hyperbolic and trigonometric functions. What’s nice is that the algorithm only requires addition, subtraction, bit shifts, and a lookup table with an entry for each bit of precision you want. Of course, if you have addition and negative numbers, you already have subtraction. This is perfect for simple CPUs and FPGAs.

[Hamster] not only has the VHDL code but also provides a C version if you find that easier to read. In either case, the angle is scaled so that 360 degrees is a full 24-bit word to allow the most precision. Although it is common to compute the result in a loop, with the FPGA, you can do all the math in parallel and generate a new sample on each clock cycle.

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How To Add UART To Your FPGA Projects

Being able to communicate between a host computer and a project is often a key requirement, and for FPGA projects that is easily done by adding a submodule like a UART. A Universal Asynchronous Receiver-Transmitter is the hardware that facilitates communications with a serial port, so you can send commands from a computer and get messages in return.

Last week I wrote about an example POV project that’s a good example for learn. It was both non-trivial and used the board’s features nicely. But it has the message hard coded into the Verilog which means you need to rebuild the FPGA every time you want to change it. Adding a UART will allow us to update that message.

The good news is the demo is open source, so I forked it on GitHub so you can follow along with my new demo. To illustrate how you can add a UART to this project I made this simple plan:

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