RISC-V

100 Articles

Building A RISC-V Desktop

February 11, 2019 by 15 Comments

If you want to talk about RISC-V, the Open Source instruction set for CPUs, you’re probably talking about microcontrollers. You can buy small but powerful RISC-V micros on par with an ARM Cortex-M4 right now. Deep in the pipeline are cores for something resembling SoCs, the kind you’d find in desktop NAS solutions, maybe a few routers, and smart TVs. This is great and all, but our idea of a ‘computer’ is still a desktop. When is the Open instruction set desktop coming? Well, it’s here right now. [Andrew Back] built a RISC-V desktop computer. It runs Linux, it comes in a case, it has HDMI and USB, there’s a graphics card in there somewhere, and it works. This is a desktop, running with a RISC-V core.

The core of this build is the HiFive Unleashed, a Linux-capable board from SiFive, makers of the first (production) RISC-V microcontroller. This board uses the Freedom U540 SOC built with a 28nm process, has 8GB of DDR4, and 32MB of Flash. For a board built on an Open archetecuture this is impressive, but it comes at a cost: the HiFive Unleashed ran for $1000 during its crowdfunding campaign.

But a board with an Open CPU does not a desktop make. You need peripheral IO, maybe a few PCIe, and hopefully a SATA interface. This problem has been solved by Microsemi with an Expansion board for the HiFive Unleashed. It includes a big ‘ol FPGA and all the connectors you could use. It also costs $2000.

With most of the parts ready to go, a few buttons, M.2 PCIe and SATA SSD storage, a graphics card, and a nice acrylic case were added. Thanks to Western Digital, building Linux was as easy as building Linux, and you end up with a desktop computer with a RISC-V brain.

Compared to a bog-standard ‘gaming machine’, this is an expensive build. The quick and dirty ballpark for the price is somewhere around $4000 USD for a machine that will let you check your Facebook. There’s a video of the machine running, you can check that out below.

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OpenISA Launches Free RISC-V VEGAboard

February 4, 2019 by 40 Comments

RISC architecture is gonna change everything, and I still can’t tell if we like that movie ironically or not. Nevertheless, RISC-V chips are coming onto the market, chipmakers seem really interested in not paying licensing fees, and new hard drives are shipping with RISC-V cores. The latest development in Open instruction sets chips comes from OpenISA. They’ve developed the VEGAboard, a dev board with two RISC-V chips and Arduino-style pin headers.

The VEGAboard comes loaded with an NXP chip which combines an ARM Cortex-M0 and Cortex-M4. So far, so good, but there are already dozens of boards that combine two ARM microcontrollers on a single development platform. The real trick is the RI5CY and Zero-RI5CY chips on the VEGAboard, a 4-stage RISC-V RV32IMCCXpulp CPU. This comes from the PULP platform, meant to be a small, low-power, but parallel platform for various processing needs. In short, with the VEGAboard, you’re not running a blink() sketch on the RISC-V microcontroller. You run the blink() sketch on the ARM microcontrollers, while using the RISC-V chip to read accelerometers and toggle pins. It’s a coprocessor, but it’s RISC-V.

Other features of the VEGAboard include 4MB of Flash, a light sensor, accelerometer, magnetometer, an RGB LED, OpenSDA serial debug adapter, an on-board BLE radio, and of course those wonky Arduino pin headers.

There are, or were, free VEGAboards available, but those are long gone. It’s still an interesting platform, though, and if you’d like to get your hands on one, production will resume shortly. Of course, if you need RISC-V right now, there are actual RISC-V Arduinos, a RISC-V with built-in neural networks, and SiFive will soon have a Linux-capable RISC-V multicore board. These are exciting times, and every day we’re seeing how RISC architecture is gonna change everything.

2018: As The Hardware World Turns

December 27, 2018 by 45 Comments

2018 is almost over, and we have another year in the dataset: an improbable number of celebrities died in 2016. The stock market is down, and everyone thinks a crash is coming. Journalists are being killed around the world. Fidget spinners aren’t cool anymore. Fortnite. Trade wars.

But not everything is terrible: Makerbot released a new printer and oddly no one complained. It was just accepted that it was an overpriced pile of suck. Elon Musk is having a great year, press and Joe Rogan notwithstanding, by launching a record number of rockets and shipping a record number of cars, and he built a subway that we’re not calling a subway. FPGA development is getting easier with new platforms and new boards. There is a vast untapped resource in 18650 cells just sitting on sidewalks in the form of scooters, and I’m going to keep mentioning this until someone actually builds a power wall out of scooters.

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How A Microcontroller Hiding In A USB Port Became An FPGA Hiding In The Same

December 25, 2018 by 21 Comments

When you think of microcontroller development, you probably picture either a breadboard with a chip or a USB-connected circuit board. But Tim Ansell pictured an ARM dev board that is almost completely hidden inside of a USB port. His talk at the 2018 Hackaday Superconference tells that story and then some. Check out the newly published video, along with more details of the talk, after the break.

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RISC-V Will Stop Hackers Dead From Getting Into Your Computer

December 13, 2018 by 35 Comments

The greatest hardware hacks of all time were simply the result of finding software keys in memory. The AACS encryption debacle — the 09 F9 key that allowed us to decrypt HD DVDs — was the result of encryption keys just sitting in main memory, where it could be read by any other program. DeCSS, the hack that gave us all access to DVDs was again the result of encryption keys sitting out in the open.

Because encryption doesn’t work if your keys are just sitting out in the open, system designers have come up with ingenious solutions to prevent evil hackers form accessing these keys. One of the best solutions is the hardware enclave, a tiny bit of silicon that protects keys and other bits of information. Apple has an entire line of chips, Intel has hardware extensions, and all of these are black box solutions. They do work, but we have no idea if there are any vulnerabilities. If you can’t study it, it’s just an article of faith that these hardware enclaves will keep working.

Now, there might be another option. RISC-V researchers are busy creating an Open Source hardware enclave. This is an Open Source project to build secure hardware enclaves to store cryptographic keys and other secret information, and they’re doing it in a way that can be accessed and studied. Trust but verify, yes, and that’s why this is the most innovative hardware development in the last decade.

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VexRISC-V Exposed

December 8, 2018 by 8 Comments

If you want to use FPGAs, you’ll almost always use an HDL like Verilog or VHDL. These are layers of abstraction just like using, say, a C compiler is to machine language or assembly code. There are other challengers to the throne such as SpinalHDL which have small but enthusiastic followings. [Tom] has a post about how the VexRISC-V CPU leverages SpinalHDL to make an extremely flexible system that is as efficient as plain Verilog. He says the example really shows off why you should be using SpinaHDL.

Like a conventional programming language, it is easy to find niche languages that will attract a little attention and either take off (say, C++, Java, or Rust) or just sort of fade away. The problem is you can’t ever tell which ones are going to become major and which are just flashes in the pan. Is SpinalHDL the next big thing? We don’t know.

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RISC-V CPU Gets A Peripheral

November 26, 2018 by 15 Comments

One of the ways people use FPGAs is to have part of the FPGA fabric hold a CPU. That makes sense because CPUs are good at some jobs that are hard to do with an FPGA, and vice versa. Now that the RISC-V architecture is available it makes sense that it can be used as an FPGA-based CPU. [Clifford Wolf] created PicoSOC — a RISC-V CPU made to work as a SOC or System on Chip with a Lattice 8K evaluation board. [Mattvenn] ported that over to a TinyFPGA board that also contains a Lattice FPGA and shows an example of interfacing it with a WS2812 intelligent LED peripheral. You can see a video about the project, below.

True to the open source nature of the RISC-V, the project uses the open source Icestorm toolchain which we’ve talked about many times before. [Matt] thoughtfully provided the firmware precompiled so you don’t have to install gcc for the RISC-V unless you want to write you own software. Which, of course, you will.

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