Reverse Engineer Then Drive LCD With FPGA

Fans of [Ben Heck] know that he has a soft spot for pinball machines and his projects that revolve around that topic tend to be pretty epic. This is a good example. At a trade show he saw an extra-wide format LCD screen which he thought would be perfect on a pinball build. He found out it’s a special module made for attaching to your car’s sun visor. The problem is that it only takes composite-in and he wanted higher quality video than that offers. The solution: reverse engineer the LCD protocol and implement it in an FPGA.

This project is a soup to nuts demonstration of replacing electronics drivers; the skill is certainly not limited to LCD modules. He starts by disassembling the hardware to find what look like differential signaling lines. With that in mind he hit the Internet looking for common video protocols which will help him figure out what he’s looking for. A four-channel oscilloscope sniffs the signal as the unit shows a blue screen with red words “NO SIGNAL”. That pattern is easy to spot since the pixels are mostly repeated except when red letters need to be displayed. Turns out the protocol is much like VGA with front porch, blanking, etc.

With copious notes about the timings [Ben] switches over to working with a Cyclone III FPGA to replace the screen’s stock controller. The product claims 800×234 resolution but when driving it using those parameters it doesn’t fill the entire screen. A bit more tweaking and he discovers the display actually has 1024×310 pixels. Bonus!

It’s going to take us a bit more study to figure out exactly how he boiled down the sniffed data to his single color-coded protocol sheet. But that’s half the fun! If you need a few more resources to understand how those signals work, check out one of our other favorite FPGA-LCD hacks.

Continue reading “Reverse Engineer Then Drive LCD With FPGA”

[Tesla500] Builds A High-Speed Video Camera

[Tesla500] has a passion for high-speed photography. Unfortunately, costs for high-speed video cameras like the Phantom Flex run into the tens or even hundreds of thousands of dollars. When tools are too expensive, you do the only thing you can – you build your own! [Tesla500’s] HSC768 is named for the data transfer rate of its image sensor. 768 megapixels per second translates to about 960MB/s due to the 10 bit pixel format used by the On Semiconductor Lupa1300-2 image sensor.

This is actually [Tesla500’s] second high-speed camera, the first was HSC80, based upon the much slower Lupa300 sensor. HSC80 did work, but it was tied to an FPGA devboard and controlled by a PC. [Tesla500’s] experience really shows in this second effort, as HSC768 is a complete portable system running Linux with a QT based GUI and a touchscreen. A 3D printed case gives the camera that familiar DSLR/MILC  shape we’ve all come to know and love.

The processor is a Texas Instruments TMS320DM8148 DaVinci, running TI’s customized build of Linux. The DaVinci controls most of the mundane things like the GUI, trigger I/O, SD card and SATA interfaces. The real magic is the high-speed image acquisition, which is all handled by the FPGA. High-speed image acquisition demands high-speed memory, and a lot of it! Thankfully, desktop computers have given us large, high-speed DDR3 ram modules. However, when it came time to design the camera, [Tesla500] found that neither Xilinx nor Altera had a FPGA under $1000 USD with DDR3 module support. Sure, they will support individual DDR3 chips, but costs are much higher when dealing with chips. Lattice did have a low-cost FPGA with the features [Tesla500] needed, so a Lattice ECP3 series chip went into the camera.

The final result looks well worth all the effort [Tesla500] has put into this project. The HSC768 is capable of taking SXGA (1280×1024) videos at 500 frames per second, or 800×600 gray·scale images at the 1200 frames per second. Lower resolutions allow for even higher frame rates.  [Tesla500] has even used the camera to analyze a strange air oscillation he was having in his pneumatic hand dryer.  Click past the break for an overview video of the camera, and the hand dryer video. Both contain some stunning high-speed sequences!

Continue reading “[Tesla500] Builds A High-Speed Video Camera”

Hacklet 28 – Programmable Logic Hacks

FPGAs, CPLDs, PALs, and GALs, Oh My! This week’s Hacklet focuses on some of the best Programmable Logic projects on Hackaday.io! Programmable logic devices tend to have a steep learning curve.  Not only is a new hacker learning complex parts, but there are entire new languages to learn – like VHDL or Verilog. Taking the plunge and jumping in to programmable logic is well worth it though. High-speed projects which would be impossible with microcontrollers are suddenly within reach!

fpga-hdmiA great example of this is [Tom McLeod’s] Cheap FPGA-based HDMI Experimenting Board. [Tom’s] goal was to create a board which could output 720p video via HDMI at a reasonable frame rate. He’s using a Xilinx Spartan 6 chip to do it, along with a handful of support components. The images will be stored on an SD card. [Tom] is hoping to do some video with the setup as well, but he has yet to see if the chip will be fast enough to handle video decoding while generating the HDMI data stream. [Tom] has been quiet on this project for a few months – so we’re hoping that either he will see this post and send an update, or that someone will pick up his source files and continue the project!

ardufpgaNext up is our own [technolomaniac] with his Arduino-Compatible FPGA Shield. Starting out with FPGAs can be difficult. [Technolomaniac] has made it a bit easier with this shield. Originally started as a project on .io and now available in The Hackaday Store, the shield features a Xilinx Spartan 6 FPGA. [Technolomaniac] made power and interfacing easy by including regulators and level shifters to keep the sensitive FPGA happy. Not sure where to start? Check out [Mike Szczys’] Spartan-6 FPGA Hello World! [Mike] takes us from installing Xilinx’s free tool chain to getting a “hello world” led blinker running!

lander3Still interested in learning about Programmable Logic, but not sure where to go? Check out [Bruce Land’s] Teaching FPGA parallel computing. Actually, check out everything [Bruce] has done on Hackaday.io – the man is a living legend, and a wealth of information on electronics and embedded systems. Being a professor of engineering at New York’s Cornell University doesn’t hurt either! In Teaching FPGA parallel computing, [Bruce] links to Cornell’s ECE 5760 class, which he instructs. The class uses an Altera/Terasic DE2 FPGA board to demonstrate parallel computing using programmable logic devices. Note that [Bruce] teaches this class using Verilog, so all you seasoned VHDL folks still can learn something new!

 

chamFinally, we have [Michael A. Morris] with Chameleon. Chameleon is an Arduino compatible FPGA board with a Xilinx Spartan 3A FPGA on-board. [Michael] designed Chameleon for two major purposes:  soft-core processors, and intelligent serial communications interface. On the processor side Chameleon really shines. [Michael] has implemented a 6502 core in his design. This means that it would be right at home as the core of a retrocomputing project. [Michael] is still hard at work on Chameleon, he’s recently gotten fig-FORTH 1.0 running! Nice work [Michael]!

Want more programmable logic goodness? Check out our Programmable Logic List!

That about wraps things up for this episode of The Hacklet! As always, see you next week. Same hack time, same hack channel, bringing you the best of Hackaday.io!

Robot Vision: Detecting Obstacles With FPGAs And Line Lasers

Somewhere down the road, you’ll find that your almighty autonomous robot chassis is going to need some sensor feedback. Otherwise, that next small step down the road may end with a blind leap off the coffee table. The first low-cost sensors we might throw at this problem would be sonars or IR rangefinders, but there’s a problem: those sensors only really provide distance data back from the pinpoint view directly ahead of them.

Rest assured, [Jonathan] wrote in to let us know that he’s got you covered. Combining a line laser, camera, and an FPGA, he’s able to detect obstacles that fall within the field of view of the camera and laser.

If you thought writing algorithms in software is tricky, wait till to you try hardware! (We know: division sucks!) [Jonathan] knows no fear though; he’s performing gradient computation on the FPGA directly to detect the laser in the camera image at a wicked 30 frames-per-second. Why roll up your sleeves and take the hardware route, you might ask? If we took a CPU-based approach at the tiny embedded-robot scale, Jonathan estimates a mere 10 frames-per-second. With an FPGA, we’re able to process images about as fast as they’re received.

Jonathan is using the Logi Board, a Kickstarter success we’ve visited in the past, and all of his code is up on the Githubs. If you crack it open, you’ll also find that many of his modules are Wishbone compliant, so developing your own projects with just some of these parts has been made much easier than trying to rip out useful features from a sea of hairy logic.

With computer-vision hardware keeping such a low profile in the hobbyist community, we’re excited to hear more about [Jonathan’s] FPGA-based robotics endeavors.

Continue reading “Robot Vision: Detecting Obstacles With FPGAs And Line Lasers”

The Zork Virtual Machine Implemented In Hardware

ZorkHitchhiker’s Guide to the Galaxy, and all the other Infocom text adventures are much more clever than the appear at first glance. They actually run on a virtual machine, with all the code for the game files squirreled away in the Z-machine format. This is great if you’re writing a game for a dozen platforms; once you have an interpreter running on one system, the entire library of games can be shipped out the door.

While the Z-machine has been ported to all the retrocomputers you can imagine and a few different brands of microcontrollers, no one has yet implemented the Z-machine in hardware. There’s a reason for this: it’s crazy. Nevertheless, [Charlie] managed to implement the Z-machine in an FPGA, using only a few extra commands for driving a display.

zork2The circuit is constructed with a $10 eBay special FPGA, the Cyclone II EP2C5. Other than that, it’s just some Flash, some RAM, a display, and a whole lot of wire. The standard Z-machine spec is followed, version 3 specifically, meaning this text adventure on a chip can run nearly every Infocom game ever written. The most popular ones, at least.

This isn’t [Charlie]’s first time in the ring with the Infocom Z-machine. He ported the Z-machine to a freakin’ pen a few years ago.

You can check out [Charlie]’s video demo below. Because there was a bit of extra space in the FPGA, [Charlie] managed to put a Mandelbrot implementation and Space Invaders in as an easter egg.

Continue reading “The Zork Virtual Machine Implemented In Hardware”

Direct Digital Synthesis (DDS)

Direct Digital Synthesis (DDS) Explained By [Bil Herd]

One of the acronyms you may hear thrown around is DDS which stands for Direct Digital Synthesis. DDS can be as simple as taking a digital value — a collection of ones and zeroes — and processing it through a Digital to Analog Converter (DAC) circuit. For example, if the digital source is the output of a counter that counts up to a maximum value and resets then the output of the DAC would be a ramp (analog signal) that increases in voltage until it resets back to its starting voltage.

This concept can be very useful for creating signals for use in a project or as a poor-man’s version of a signal or function generator. With this in mind I set out here to demonstrate some basic waveforms using programmable logic for flexibility, and a small collection of resistors to act as a cheap DAC. In the end I will also demonstrate an off-the-shelf and inexpensive DDS chip that can be used with any of the popular micro-controller boards available that support SPI serial communication.

All of the topics covered in the video are also discussed further after the break.

Continue reading “Direct Digital Synthesis (DDS) Explained By [Bil Herd]”

Improving The Parallax Propeller In An FPGA

The Parallax Propeller is an interesting chip that doesn’t get a lot of love, but since the entire chip was released as open source, that might be about to change: people are putting this chip inside FPGA and modifying the binaries to give the chip functions that never existed in the original.

Last August, Parallax released the source for the P8X32A, giving anyone with an FPGA board the ability to try out the Prop for their own designs. Since then, a few people have put some time in, cleaning up the files, unscrambling ROM images, fixing bugs, and all the general maintenance that an open source microcontroller core requires.

[Sylwester] has grabbed some of the experimental changes found on the Parallax forum and included them as a branch of the Propeller source. There is support for a second 32-bit port, giving the new chip 64 I/O pins, multiply instructions, video generators, hard-coded SD card libraries, and a variant called a microProp that has four cores instead of eight.

You can grab all the updated sources right here and load them up on a DE0 Nano FPGA board. If you’re exceptionally lucky and have the Altera DE2-115 dev board, you’ll also be able to run the upcoming Propeller 2.