FPGA

387 Articles

Retrocomputing With Open Source FPGAs

August 28, 2017 by 27 Comments

A few years ago, we saw the reverse engineering of the Lattice iCE40 bitstream, opening the door to a completely Open Source development tool chain for FPGAs. This was an astonishing amount of work from [Clifford Wolf], [Mathias Lasser], and [Cotton Seed], but since then we haven’t seen a whole lot from Project IceStorm. Now, that’s about to change, and in the coolest way possible. [hoglet] is retrocomputing on an ICE40 development board.

This is an implementation of the Acorn Atom on a myStorm BlackIce board. This board is basically just a Lattice iCE40 FPGA, a few support components, and a bunch of pin headers, some of which are in the not-so-handy Arduino pinout footprint. By porting some Acorn Atom implementations and a 6502 core to verilog, [hoglet] was able to stuff a cool old retrocomputer onto an Open Source FPGA development board. Video output is through a resistor DAC driving a VGA cable, and keyboard input is through PS/2.

Just about everything about this Open Source implementation of the Acorn works, and there’s still a lot left in the iCE40 FPGA. [hoglet] is able to run the 6502 core at 25MHz, which means just about every 6502-based system should be able to run on the BlackIce board.

 

TinyFPGA Is A Tiny FPGA Board

July 31, 2017 by 40 Comments

We recently noticed an open source design for TinyFPGA A-Series boards from [Luke Valenty]. The tiny boards measure 18 mm by 30.5 mm and are breadboard friendly. You can choose a board that holds a Lattice Mach XO2-256 or an XO2-1200, if you need the additional capacity.

The boards have the JTAG interface on the side pins and also on a top header that would be handy to plug in a JTAG dongle for programming. The tiny chips are much easier to work with when they are entombed in a breakout board like this. Bigger boards with LEDs and other I/O devices are good for learning, but they aren’t always good for integrating into a larger project. The TinyFPGA boards would easily work in a device you were prototyping or doing a small production run.

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VexRiscv: A Modular RISC-V Implementation For FPGA

July 21, 2017 by 16 Comments

Since an FPGA is just a sea of digital logic components on a chip, it isn’t uncommon to build a CPU using at least part of the FPGA’s circuitry. VexRiscv is an implementation of the RISC-V CPU architecture using a language called SpinalHDL.

SpinalHDL is a high-level language conceptually similar to Verilog or VHDL and can compile to Verilog or VHDL, so it should be compatible with most tool chains. VexRiscv shows off well in this project since it is very modular. You can add instructions, an MMU, JTAG debugging, caches and more.

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Voice Shifting With A Cyclone V FPGA

June 18, 2017 by 9 Comments

Cornell Students [Sean Carroll], [Gulnar Mirza], and [James Talmage] designed a realtime pitch shifter to run on their DE1-SoC and controlled by its ARM core.

The team’s goals were to pitch-shift the left and right outputs independently, to produce chords using the original voices as well as the pitch-shifted ones, and time-delayed pitch shifting. All of it is controlled on a VGA monitor through a simple GUI, allowing users to create lots of different effects by layering the different options.

Under the hood they made use of dual circular buffers to do the pitch shifting, reading in the sample and then using simple fixed-point arithmetic to modify it, then running the signal through a Butterworth filter to clean up artifacts.

The project was built as part of [Bruce Land]’s ECE5760 class. If you’re looking for more DE1 goodness, you’ll find excellent projects aplenty on Hackaday, including the LED Matrix Audio Visualizer from last year and Synthesizing Strings on a Cyclone V, among many others.

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Open Source Digital Cinema

June 17, 2017 by 19 Comments

Years in the making, Apertus has released 25 beta developer kits for AXIOM–their open source digital cinema camera. This isn’t your point-and-shoot digital camera. The original proof of concept from 2013 had a Zynq processor (a Zedboard), a super 35 4K image sensor, and a Nikon F-Mount.

The device today is modular with several options. For example, there is an HDMI output module, but  DisplayPort, 4K HDMI, and USB 3.0 options are in development. You can see several sample videos taken with the device, below.

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You Are Go For FPGA!

June 14, 2017 by 39 Comments

Reconfigure.io is accepting beta applications for its environment to configure FPGAs using Go. Yes, Go is a programming language, but the software converts code into FPGA constructs, so you don’t need Verilog or VHDL. Since Go supports concurrent routines and channels for synchronization and communications, the parallel nature of the FPGA should fit well.

According to the project’s website, the tool also allows you to reconfigure the FPGA on the fly using a cloud-based build and deploy system. There isn’t much detail yet, unless you get accepted for the alpha. They claim they’ll give priority to the most interesting use cases, so pitching your blinking LED project probably isn’t going to cut it. There is a bit more detail, however, on their GitHub site.

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Quality Assurance Through FPGA

June 10, 2017 by 13 Comments

[Claire Chen] and [Mark Zhao], students in [Bruce Land]’s ECE5760 class at Cornell, created a project aimed at the manufacturing sector: quality-checking manufactured products automatically by visually scanning a bunch of them and processing the pixels one at a time. Ordinarily, the time when the widget comes off the line is when you have to bring in actual people to inspect. This project uses morphological image processing to like dilation and erosion to look for flaws.

[Claire] and [Mark] created a simulated manufacturing line with a servo-driven belt that brings a series of Spree candies into the range of a camera, which scans them. The SoC with a Cyclone V FPGA and ARM Cortex-9 then processes the raw images to establish the object’s color, while running it through a couple of algorithms to look for defects. The FPGA tracks how many Sprees that have passed by as well as their color, maintaining a 99% success rate with a rate of 5-10 frames per second. The FPGA also looks at each blob of color as a collection of pixels, establishing connectivity to help to distinguish multiple Sprees touching each other.

Also be sure to check out [Claire] and [Mark]’s bike sonar project from a previous semester.

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