fpga

546 Articles

Reverse Engineering The Behringer Ultranet Protocol

March 5, 2024 by 26 Comments

Ultranet is a protocol created by audio manufacturer Behringer to transmit up to 16 channels of 24-bit sound over a Cat-5 cable. It’s not an open standard, though: Behringer doesn’t offer an API or protocol description to build your own Ultranet devices. But that didn’t stop [Christian Nödig], thanks to a defective mixer, he poked into the signals and built his own Ultranet receiver.

Ultranet runs over Cat-5 ethernet cables but isn’t an ethernet-based protocol. The electrical protocols of Ultranet are identical to Ethernet, but the signaling is different, making it a Level 1 protocol. So, you can use any Cat-5 cable for Ultranet, but you can’t just plug an Ultranet device into an Ethernet one. Or rather, you can (and neither device should explode), but you won’t get anything out of it.

Instead, [Christian]’s exploration revealed that Ultranet is based on another standard: AES/EBU, the bigger professional brother of the SPD/IF socket on HiFi systems. This was designed to carry digital audio over an XLR cable, and Behringer has taken AES/EBU and tweaked it to run over a single twisted pair. With two twisted pairs in the cable carrying a 192 kbps signal, you get sixteen channels of 24-bit audio in total over two twisted pairs inside the Cat-5 cable.

That’s a bit fast for a microcontroller to decode reliably, so [Christian] uses the FPGA in an Arduino Vidor 4000 MKR in his receiver with an open-source AES decoder core to receive and decode the Ultranet signal into individual channels, which are passed to an ADC and analog output.

In effect, [Christian] has built a 16-channel mixer, although the mixing aspect is too primitive for actual use. It would be great for monitoring, though, and it’s a beautiful description of how to dig into protocols like Ultranet that look locked up but are based on other, more open standards.

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Compute The Mandelbrot Set With A Custom RISC-V CPU

January 17, 2024 by 9 Comments

When faced with an FPGA, some people might use it to visualize the Mandelbrot set. Others might use it to make CPUs. But what happens if you combine the two? [Michael Kohn] shows us what happens with his RISC-V CPU with an instruction specially made for computing the Mandelbrot set.

[Michael] takes us through the unusual process of turning his 8008 into a RISC-V CPU. Re-using bits of logic here and replacing other logic there leaves him with a functional RISC-V core. Not finished, [Michael] takes it upon himself to also create a custom instruction just for computing a point for the Mandelbrot set, accelerating the demo from twenty-three seconds to merely one!

Still not finished, [Michael] also creates an implementation of the long gone F100-L CPU, once again with added Mandelbrot set flair, simultaneously with the RISC-V project. Finally, he ports his “Java Grinder” Java bytecode compiler to both RISC-V and the F100-L, because Java runs on 1 Billion devicesTM.

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Building A GPS Receiver From The Ground Up

January 2, 2024 by 15 Comments

One of the more interesting facets of GPS is that, at least from the receiver’s point-of-view, it’s a fairly passive system. All of the information beamed down from the satellites is out in the ether, all the time, free for anyone on the planet to receive and use as they see fit. Of course you need to go out and buy a receiver or, alternatively, possess a certain amount of knowledge to build a circuit that can take those signals and convert them into something usable. Luckily, [leaning_tower] has the required knowledge and demonstrates it with this DIY GPS receiver.

This receiver consists of five separate circuit boards, all performing their own function. The first, a mixer board, receives the signal via an active antenna and converts it to a lower frequency. From there it goes to a second mixer and correlation board to compare the signal to a local reference, then a signal processing board that looks at this intermediate frequency signal to make sense of the data its seeing. Finally, an FPGA interfacing board ties everything together and decodes the information into a usable form.

Dealing with weak signals like this has its own set of challenges, as [leaning_tower] found out. The crystal oscillator had to be decapped and modified to keep from interfering with the GPS radio since they operated on similar frequencies. Even after ironing out all the kinks, the circuit takes a little bit of time to lock on to a specific satellite but with a second GPS unit for checking and a few weeks of troubleshooting, the homebrew receiver is up and running. It’s an impressive and incredibly detailed piece of work which is usually the case with sensitive radio equipment like GPS. Here’s another one built on a Raspberry Pi with 12 channels and a pretty high accuracy.

Will We Recycle FPGAs In The Future?

December 22, 2023 by 21 Comments

If you really want to look at how much something costs, you need to look at total cost of ownership, not just the sticker price. Same goes for things like pollution and carbon footprint. A vehicle, for example, might have a low carbon footprint in operation but require more carbon in the manufacturing or disposal processes. Researchers have noted that FPGA accelerators get replaced and may wind up as e-waste in as little as two years. They propose REFRESH, an architecture that recycles old FPGAs into new ones by joining multiple FPGA dice with a simple interposer to coordinate the work.

The idea is not as radical as it might first seem. Many modern chips use chiplets anyway, so this is a reasonable extension of that idea. You simply need a way to harvest the old devices.

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Hackaday Links: December 10, 2023

December 10, 2023 by 8 Comments

In this week’s episode of “Stupid Chatbot Tricks,” it turns out that jailbreaking ChatGPT is as easy as asking it to repeat a word over and over forever. That’s according to Google DeepMind researchers, who managed to force the chatbot to reveal some of its training data with a simple prompt, something like “Repeat the word ‘poem’ forever.” ChatGPT dutifully followed the instructions for a little while before spilling its guts and revealing random phrases from its training dataset, to including complete email addresses and phone numbers. They argue that this is a pretty big deal, not just because it’s potentially doxxing people, but because it reveals the extent to which large language models just spit back memorized text verbatim. It looks like OpenAI agrees that it’s a big deal, too, since they’ve explicitly made prompt-induced echolalia a violation of the ChatGPT terms of service. Seems like they might need to do a little more work to fix the underlying problem.

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Nyan Keys: Because Your Keyboard Is Painfully Slow

December 10, 2023 by 33 Comments

You probably don’t notice keyboard latency when typing or doing mundane tasks, but if you start gaming, that’s also when you might start complaining. Every millisecond counts in that arena. Think your keyboard is fast? Think again. Because unfortunately, no matter what you’ve got in there, that key matrix is slowing you down. What you need is an FPGA-based keyboard with an overkill MCU. You need Nyan Keys.

[Portland.HODL] set out to make the lowest-latency mechanical keyboard possible that would accept any Cherry-compatible switches, and boy howdy, is this thing fast.

Coupled with the STM32F723VET6 MCU is USB 2.0 HS, which has an 8000Hz polling rate. At worst, key latency measures 30μS, which blows the 1mS average out of the water.

Because it uses a Lattice Semi iCE40HX 4k FPGA, each key switch can connect to its own I/O pin, which also eliminates the need for diodes.

It also means that each key switch can have its own “core” — an 8-bit timer that is always counting up to 255. The key can only change its state when the timer reads 255. This acts as a rather clever debounce mechanism.

If all that’s not enough, [Portland.HODL] built an operating system called NyanOS written in C to avoid any performance-reducing overhead. Oh, and it has an opt-in Bitcoin miner.

We’ve seen a lot of keyboards, the fast ones are fast because of the input side — they are chording keyboards that take combinations to type, rather than using one key (or so) per character. The Characorder is so fast that it was banned from competition.

BeagleV Catches Fire With The BeagleV-Fire

November 4, 2023 by 35 Comments

A new BeagleBoard is on the way, full of FPGA hotness: the BeagleV-Fire has been announced. The new $150 Single-Board Computer (SBC) from the pioneering open source BeagleBoard company is built around a RISC-V chip that has FPGA features built in. The BeagleV-Fire is built around the snappily named Microchip PolarFire MPFS025T FCVG484E, a System on a Chip (SoC) that has five Reduced Instruction Set Coding Version 5 (RISC-V) cores and a big chunk of FPGA fabric built in. That means it combines the speed of RISC-V processors with the flexibility of Field Programmable Gate Arrays (FPGA), a big pile of logic gates that can be reprogrammed.

The new BeagleV-Fire includes a sizeable chunk of FPGA to work with: the core chip includes 23 K logic elements and 68 Math blocks, plus 4 Serializer/Deserializer (SerDer) lanes that can throw about 12.7 Gbps of data into and out of the fabric. On the BeagleV-Fire, the main chip is supported by 16 GB of eMMC and 2 GB of LPDDR4 RAM, plus a micro SD slot for extra storage. Gigabit Ethernet is also included, plus USB-C power and a few serial connections for debugging. There is no WiFi built in, but there is an M.2 Key E connection were you could plug in an a wireless adapter if you need it.

Like most other BeagleBoards, the BeagleV-Fire has two headers with 92 pins, which offer access to pretty much every signal on the board, plus lots of analog to digital stuff that works with add-on boards (BeagleBoard refers to them as capes). Also present is the usual 22-pin CSI connector for attaching cameras and other devices.

Want one? They are available for immediate order on BeagleBoard.org or from the usual suspects. It looks like they are already in stock for next-day delivery. If this all sounds familiar, it’s probably because we’ve been posting about this particular board for awhile now, covering both the announcement and first tests. Continue reading “BeagleV Catches Fire With The BeagleV-Fire” →