Icestorm Tools Roundup: Open Source FPGA Dev Guide

October 3, 2018 by 7 Comments

We like the ICE40 FPGA from Lattice for two reasons: there are cheap development boards like the Icestick available for it and there are open source tools. We’ve based several tutorials on the Icestorm toolchain and it works quite well. However, the open source tools don’t always expose everything that you see from commercial tools. You sometimes have to dig a little to find the right tool or option.

Sometimes that’s a good thing. I don’t need to learn yet another fancy IDE and we have plenty of good simulation tools, so why reinvent the wheel? However, if you are only using the basic workflow of Yosys, Arachne-pnr, icepack, and iceprog, you could be missing out on some of the most interesting features. Let’s take a deeper look.

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FPGA Starter Videos To Help Soften That Learning Curve

February 17, 2022 by 8 Comments

Digi-Key have been producing YouTube videos for a number of years now, and if you weren’t aware, they’re definitely worthy of some viewing time. The playlist we’re highlighting here is a pretty good introduction to FPGAs, specifically those supported by open source tools, with low cost hardware. If you’ve always wanted to get into hacking FPGA platforms, but don’t know where to start, this is going to be a big help. After first covering what an FPGA is and is not, and why you want to use one, [Shawn Hymel] dives in to the toolchain.

We’re really lucky that the bitstream for the Lattice iCE40 was reverse engineered by the super talented Claire (née Clifford) Wolf (AMP hour interview) which enabled the project ICEstorm toolchain to be created. Leveraging Yosys for synthesis and logic mapping, Icarus verilog coupled with GTKwave for simulation, netpnr for place and route and finally the project ICEstorm bitstream tools for packing into iCE40 format and loading onto the hardware. The whole toolchain flow is managed by APIO for simplicity, that is, provided your FPGA board is supported!

Of course, [Shawn] is using the low cost (for an FPGA) ICEStick by Lattice for this tutorial series, and they’re currently hard to get (you know why by now!) but, there are many other boards you could use. If you want to play with applications coupling a ARM micro to an FPGA, then the excellent BlackIce Mx is an option, but there are many other boards now with an decent micro nestled next to an FPGA and a few peripherals for convenience.

We should mention here, that project ICEstorm and the iCE40 is not the only show in town. Project Trellis has had our eye for a while, which targets the more complex Lattice ECP5 device. Yosys and friends do support more architectures, but the available flows usually require at least some vendor tool support at this time (looking straight at you, Xilinx) but as more devices get decoded, the open source tools will grow, and we will bring you that news!

What’s nice about this Digi-Key YT series, is that it doesn’t just cover the basic toolchain flow, then drop you in at the deep end of a big learning curve. There are videos covering subjects such as finite state machines (FSMs), test-benching and simulation, using embedded (block) memories, PLLs, harder subjects like dealing with metastability and clock-domain crossing (OK, he covers one technique – there’s more than one way to skin that particular cat) before finally looking at soft cores like the RISC-V. Lots to learn, and pretty well executed if you ask us! A Github version is available, for those who can’t stand watching the videos!

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Using Docker To Sail Through Open-Source Xilinx FPGA Development

May 5, 2021 by 21 Comments

Until a few years ago, developing for FPGAs required the use of proprietary locked-down tools, but in the last few years, the closed-source dam has burst, and open-source FPGA tools such as Yosys, SimbiFlow, and Icestorm have come flooding out. Setting up a build environment for these exciting new tools can still be quite a challenge, but [Carlos Eduardo] has decided to make setting up an open-source toolchain for Xilinx FPGAs a breeze with Docker.

His image only has three prerequisites: Docker, Python 3, and OpenOCD (which is used to load your FPGA with your bespoke bitfile). After the Docker image has been built and all of the tools installed, [Carlos] guides you through using Python, FuseSoc, and SymbiFlow to build your first open-source Xilinx FPGA project.

In addition to making setup a whole lot easier, utilizing containers allows the same development environment to be built on Linux, Mac, and Windows (using WSL), which will make life a lot easier for teams working across different OSs.  [Carlos’s] Dockerfile is unique because it supports the popular Artix-7 series of FPGAs — for the Lattice FPGAs that have been supported for a lot longer, there are existing Docker files already up on DockerHub. It’s easier than installing the vendor’s toolchain!

If this has you thinking it might be time to dip your toes into open-source FPGA development, check out this rundown of open-source FPGA tools from the 2019 Superconference.

Mithro Runs Down Open Source FPGA Toolchains

March 6, 2020 by 28 Comments

Tim [Mithro] Ansell has a lot to tell you about the current state of open FPGA tooling: 115 slides in 25 minutes if you’re counting. His SymbiFlow project aims to be the GCC of FPGA toolchains: cross-platform, multi-platform, completely free, and all-encompassing. That means that it’s an umbrella framework for all of the work that everyone else is doing, from work on synthesis and verification tools, to placing and routing, to vendor-specific chip libraries. His talk catches you up with the state of the art at the end of 2019, and it’s embedded below. Spoiler alert: SymbiFlow has the big Xilinx 7-series FPGAs in its crosshairs, and is closing in. SymbiFlow is that close to getting a networked Linux system on the FPGA fabric in a Xilinx 7 today, completely independent of any vendor tools.

But let’s step back a sec for a little background. When you code for an FPGA, words you type get turned into a bitstream of ones and zeroes that flip perhaps a few million switches inside the chip. Going from a higher-level language to a bitstream is a lot like compiling normal programming languages, except with the twist that the resulting computational logic doesn’t map straight into a machine language, but rather into lower-level physical hardware on the FPGA. So “compilation” for FPGAs involves two steps: synthesis and place-and-routing. Synthesis takes the higher-level language that you write and turns it into a set of networks and timing requirements that represent the same logic, and can work across chip families. Yosys is the open-source synthesis tool of choice here.

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Yosys Fronts For Xilinx ISE

December 13, 2019 by 13 Comments

We always marvel at how open-source tools can often outstrip their commercial counterparts. Yosys, the open-source tool for Verilog synthesis, is a good example. Although the Xilinx ISE design suite is something close to abandonware, a lot of people still use it because it supports older FPGAs the newer tools don’t. Its Verilog parser is somewhat slow to catch up to new standards, and according to a recent GitHub update, Yosys can now provide files for ISE that target Spartan 6, Virtex 7, and Series 7 FPGAs. In addition, there is some support for Spartan 3, Virtex 2, 4, and 5, although those are not ready yet.

According to the post, you’ll want to use the synth_xilinx command along with the -ise option and a -family option that matches your target (that is, xc6s for Spartan 6).  On the output side, you’ll write an EDIF file using the write_edif command.

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Bringing FPGA Development To The Masses

July 5, 2019 by 55 Comments

The Field Programmable Gate Array (FPGA) is one of the most exciting tools in the modern hacker’s arsenal. If you can master the FPGA, you can create hardware devices that not only morph and change based on your current needs, but can power through repetitive tasks at phenomenal rates. The only problem is, working with FPGAs can be a bit intimidating for newbies. One could argue that the technology is waiting on its “Arduino” moment; the introduction of a cheap development board coupled with easy to use software that brings FPGA hacking into the mainstream.

If everything goes according to plan, the wait might soon be over. [Ryan Jacobs] believes his project WebFPGA is the easiest and fastest way to get your hands dirty with this incredible technology. Outwardly the hardware could pass for an Arduino Nano clone, with a bunch of GPIO pins and a couple of LEDs on a small breadboard-friendly PCB. Certainly a no-frills presentation. It’s the software side is where things get interesting: all you need to develop for this FPGA is a modern web browser.

Currently Chrome, Opera, and Edge are supported, even if they’re running on relatively low-end computers. [Ryan] says this makes it much easier and cheaper to roll out FPGA classes in schools, as students can do everything with their existing Chromebooks. As the video after the break shows, you can even get away with using a sufficiently powerful smartphone to do some FPGA hacking on the go.

So what’s the trick? Essentially the heavy-lifting is done remotely: all of the synthesis is performed in their cloud backend, with the final bitstream delivered to the user for installation through WebUSB. If you’re more comfortable on the command line, [Ryan] says they’re currently working on tools which will allow you to perform all the necessary interactions with their cloud service without the browser.

The more critical Hackaday reader will likely be concerned about lock-in. What happens if you buy one of these development boards without a license for the service, or worse, what happens if WebFPGA goes belly-up down the road? To that end, [Ryan] makes it clear that their hardware is completely compatible with existing offline FPGA development tools such as the open source IceStorm.

We’ve seen considerable interest in low-cost FPGA development platforms, with readers perhaps recalling the excitement surrounding the fire sale of the Pano Logic thin clients. Despite efforts to make developing for these systems even easier, it’s hard to imagine the bar getting much lower than what WebFPGA is shooting for. Their Kickstarter campaign is close to crossing the finish line, and we’re very interested to see where the product goes from here.

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Wooden Clock To FPGA Conversion

January 2, 2019 by 6 Comments

[John] wanted a project to help him learn more about FPGAs. So he started with his wooden clock — made with an Arduino — and ported it over to a Lattice FPGA using Icestorm. What’s nice is that he takes you through the steps he used to simulate the design using the Falsted simulator and then realizing it in the FPGA. Since he’s just starting out, it is a good bet he ran into the same rough edges you will (or did) and sometimes that can really help get you over the hump. You can see a video below, and the code for the project is on GitHub.

For example, after mocking up a circuit design in Falstad he realized he could make one large counter instead of several modules, and he contrasts that to a more modular approach. He also ran into a feature that was simple for the Arduino but difficult for the FPGA. He got it working, but it took some optimization effort to make everything fit in the relatively small FPGA he was using.

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