FPGA

384 Articles

FPGA Starter Videos To Help Soften That Learning Curve

February 17, 2022 by 8 Comments

Digi-Key have been producing YouTube videos for a number of years now, and if you weren’t aware, they’re definitely worthy of some viewing time. The playlist we’re highlighting here is a pretty good introduction to FPGAs, specifically those supported by open source tools, with low cost hardware. If you’ve always wanted to get into hacking FPGA platforms, but don’t know where to start, this is going to be a big help. After first covering what an FPGA is and is not, and why you want to use one, [Shawn Hymel] dives in to the toolchain.

We’re really lucky that the bitstream for the Lattice iCE40 was reverse engineered by the super talented Claire (née Clifford) Wolf (AMP hour interview) which enabled the project ICEstorm toolchain to be created. Leveraging Yosys for synthesis and logic mapping, Icarus verilog coupled with GTKwave for simulation, netpnr for place and route and finally the project ICEstorm bitstream tools for packing into iCE40 format and loading onto the hardware. The whole toolchain flow is managed by APIO for simplicity, that is, provided your FPGA board is supported!

Of course, [Shawn] is using the low cost (for an FPGA) ICEStick by Lattice for this tutorial series, and they’re currently hard to get (you know why by now!) but, there are many other boards you could use. If you want to play with applications coupling a ARM micro to an FPGA, then the excellent BlackIce Mx is an option, but there are many other boards now with an decent micro nestled next to an FPGA and a few peripherals for convenience.

We should mention here, that project ICEstorm and the iCE40 is not the only show in town. Project Trellis has had our eye for a while, which targets the more complex Lattice ECP5 device. Yosys and friends do support more architectures, but the available flows usually require at least some vendor tool support at this time (looking straight at you, Xilinx) but as more devices get decoded, the open source tools will grow, and we will bring you that news!

What’s nice about this Digi-Key YT series, is that it doesn’t just cover the basic toolchain flow, then drop you in at the deep end of a big learning curve. There are videos covering subjects such as finite state machines (FSMs), test-benching and simulation, using embedded (block) memories, PLLs, harder subjects like dealing with metastability and clock-domain crossing (OK, he covers one technique – there’s more than one way to skin that particular cat) before finally looking at soft cores like the RISC-V. Lots to learn, and pretty well executed if you ask us! A Github version is available, for those who can’t stand watching the videos!

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Tilting At Windmills Nine Bits At A Time

February 11, 2022 by 18 Comments

In the old days — we are talking like the 1960s and 1970s — computers were often built for very specific purposes using either discrete logic or “bit slice” chips. Either way, more bits meant more money so frequently these computers were made with just enough bits to meet a required precision. We don’t think that was what was on [Mad Ned’s] mind, though, when he decided to implement a 9-bit CPU called QIXOTE-1 on an FPGA.

Like many hobby projects, this one started with an FPGA board in search of a problem. At first, [Ned] had a plan to create a custom computer along with a custom language to then produce a video game. A quick search on the Internet led to that being a common enough project with one guy that we’ve talked about here on Hackaday before knocking it out of the park.

[Ned] then thought about just doing a no-software video game. Too late to be the first to do that. Not to be deterred, he decided to duplicate the PDP-8. Whoops. That’s been done before, too. Wanting something original, he finally decided on a custom CPU. Since bytes are usually — if not technically — 8 bits, this CPU calls its 9-bit words nonads and uses octal which maps nicely to three digits per nonad.

This first post talks about the story behind the CPU and gives a short overview of its capabilities, but we are waiting for future posts to show more of what’s behind the curtain in what [Ned] calls “Holy Nonads, Part 010.”

The downside to doing a custom CPU is you have to build your own tools. You can always, of course, duplicate something and steal your toolchain. Or go universal.

DE10-Lite Dev Board / Game Controller

DE10-Lite-Ful FPGA Dev Board Hack Plays The 1981 Classic Defender

January 8, 2022 by 6 Comments

We’re not sure what the assignment was, but the results of [Garret Carter]’s homework for his Digital System Design class at Tennessee Tech couldn’t help but capture our attention. Below the break you can see what [Garrett] describes as a “simplified stylized version” of the 1981 arcade hit “Defender”.

With the goal of keeping the price low but keeping performance as high as possible, [Garrett] set forth to program the DE10-Lite FPGA development board in VHDL. The results are convincing, and while not perfect, came in under budget.

The DE10-Lite board gave [Garrett] the opportunity to get even more creative, using the dev board’s onboard switches, buttons, 7-segment LED’s and accelerometer to full effect. In this case, the dev board is not only the game, but also the controller and status display. A very neat hack indeed!

If you want to make your own, you can get the full project details at [Garrett]’s Github page. And [Garrett], we don’t know what marks your professor will give, but we give you an A+, would definitely play again.

While FPGA development boards aren’t necessarily inexpensive, our own Jenny List shows where you might be able to find a used but workable FPGA board for a fraction of the cost, If you know where to look.

Continue reading “DE10-Lite-Ful FPGA Dev Board Hack Plays The 1981 Classic Defender” →

6502 Goes FPGA (Again)

December 26, 2021 by 35 Comments

While there has been no shortage of FPGA-based recreations of classic processors, we always enjoy seeing a new approach. Last month [Some Assembly Required] took on the challenge to recreate a classic computer from the ground up and started with a 6502 implementation in Verilog. You can see in the second video below that he’s made good progress and there are apparently more videos to come.

The ROL instruction is the subject of the second video. We liked the approach of looking at what the instruction does and how many cycles it takes on different variants It is always good to make sure you know exactly what you are trying to accomplish before you get started.

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Using VHDL To Generate Discrete Logic PCB Designs

November 13, 2021 by 36 Comments

VHDL and Verilog are hardware description languages, used to describe and define logic circuits. They’re typically used to design ASICs and to program FPGAs, essentially using software to define hardware. However, [Tim] has done something altogether quite creative, creating tools to take VHDL and Verilog and spit out PCB designs for discrete logic. 

Yes, you read that correctly. The basic idea is to take VHDL source code, and then make a PCB layout that implements the desired logic using resistor-transistor logic. From there, the PCB design files can be shipped off to a manufacturer for pick-and-place assembly at a fraction of the cost of producing a bespoke ASIC.

The drawbacks are obvious; tons of individual discrete parts are required, the size penalty is hilariously bad, and power usage is almost certainly orders of magnitude higher than doing the same logic on an ASIC or even FPGA. Oh, and everything’s much slower, too.

However, as an academic exercise or simply for fun, it’s an awesome bit of work. The idea that one can define a complicated logic circuit and have a PCB implementing the logic whipped up by automated tools is amazing, and we absolutely want to see more of this type of thing.

We’ve seen similar work done with VHDL synthesis into 74-series logic design. If you’ve been developing your own fancy digital-logic-fu, be sure to drop us a line!

[Thanks to Yann Guidon for the tip!]

The Game Of Life Moves Pretty Fast, If You Don’t Use Stop Motion You Might Miss It

November 11, 2021 by 12 Comments

Munged Ferris Bueller quotes aside, Conway’s Game of Life is the classic cellular automata that we all reach for. The usual approach is to just iterate over every cell in the grid, computing the next state into a new grid buffer. [K155LA3] set out to turn that on its head by implementing Game Of Life in the hardware of an FPGA.

[K155LA3]’s version uses Chisel, a new HDL from the Berkley and RISCV communities. Under the hood, Chisel is Scala with some custom libraries that know how to map Scala concepts onto hardware. In broad strokes, Verilog and VHDL are focused on expressing hardware and then added abstraction on top of that over the year. Chisel and other newer HDL languages focus on expressing high-level general-purpose elements that get mapped onto hardware. FPGAs already map complex circuits and hardware onto LUTs and other slices, so what’s another layer of abstraction?

The FPGA chosen for this project is a Digilent Arty A7 with a VGA Pmod to turn the RGB444 into analog signals to actually display. What’s impressive about [K155LA3]’s implementation is just how fast it is. Even running at 60 frames per second it’s almost as fast as the monitor can handle. Of course, most computers lying around you could simulate a 60 x4 8 grid at 60 fps. Next, instead of connecting the grid logic to the 60 Hz VGA clock, he connects it to the 100 MHz board external oscillator. Now each pixel in each frame displayed contains over a million generations.

Unfortunately, even this small grid of 60×48 takes up 90% of the LUTs on the Artix-7. In the future, we’d love to see an even larger FPGA hardware implementation capable of handling grids that could hold whole computers in them. And naturally, this isn’t the first FPGA version of the Game Of Life here at Hackaday.

Oscilloscope Clocks: Now In Color!

October 28, 2021 by 5 Comments

Ordinarily, when we hear the words “clock” and “oscilloscope” in the same sentence we conjure images of measuring a stable, repeating square wave that acts as the heartbeat of a system. Of course, that’s not the only meaning– there’s a much more fun and less useful one: using an oscilloscope to display the time.

That’s what [Wolfgang Friedrich] set out to do when he cobbled some protoboard, probes, and an FPGA into the Multi Color Oscilloscope Clock. Each digit on the clock is treated like a seven-segment display, made up of three horizontal bars and four vertical bars. The horizontal bars are generated by constant voltage at different levels, and the vertical bars are generated by quickly switching between two voltages. [Wolfgang] decided to use an R-2R resistor ladder DAC to create the appropriate analog signals from the FPGA’s digital outputs. For bonus points, each set of digits (hours, minutes, and seconds) are output concurrently through separate channels, so they can be displayed in different colors on the screen of his four-channel scope (the fourth channel is used for the points between numbers).

Misusing oscilloscopes in the name of fun has become a time-honored tradition– from Tennis for Two back in 1958 (which later became the beloved Pong) to the plethora of analog o-scope clocks we’ve seen, it’s clear that hackers just can’t get enough of the unique vector display style that a scope can provide. We love [Wolfgang]’s idea of using the scope’s channels to create a multi-color display, and we’re left wondering what kind of wacky waveforms we’ll be seeing next.