Weird CPU

How many instructions does [agp.cooper’s] computer have? Just one. How many strip boards does it use? Apparently, 41 five 41-track boards. While being one shy from the answer to life, it is still a lot of boards for a single instruction. The high board count is due to the use of 1970’s vintage ICs including TTL parts, 2114 RAM chips, and 74S571 PROMs.

There are several different architectures for single instruction computers and [agp’s] uses what is technically at TTA (transfer-triggered architecture). That is, the one instruction is a move and the destination or source of the move determines the operation. For example, the Wierd CPU (that’s the name of it) has a P and Q register. If you load those registers and then the ADD register will contain the sum of the two numbers.

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1000 CPUs on a Chip

Often, CPUs that work together operate on SIMD (Single Instruction Multiple Data) or MISD (Multiple Instruction Single Data), part of Flynn’s taxonomy. For example, your video card probably has the ability to apply a single operation (an instruction) to lots of pixels simultaneously (multiple data). Researchers at the University of California–Davis recently constructed a single chip with 1,000 independently programmable processors onboard. The device is energy efficient and can compute up to 1.78 trillion instructions per second.

The KiloCore chip (not to be confused with the 2006 Rapport chip of the same name) has 621 million transistors and uses special techniques to be energy efficient, an important design feature when dealing with so many CPUs. Each processor operates at 1.78 GHz or less and can shut itself down when not needed. The team reports that even when computing 115 billion instructions per second, the device only consumes about 700 milliwatts.

Unlike some multicore designs that use a shared memory area to communicate between processors, the KiloCore allows processors to directly communicate. If you are just a diehard Arduino user, maybe you could scale up this design. Or, if you want to make use of the unused power in your video card under Linux, you can always try to bring KGPU up to date.

A Dis-Integrated 6502

The 6502 is the classic CPU. This chip is found in the original Apple, Apple II, PET, Commodore 64, BBC Micro, Atari 2600, and 800, the original Nintendo Entertainment System, Tamagotchis, and Bender Bending Rodriguez. This was the chip that started the microcomputer revolution, and holds a special place in the heart of every nerd and technophile. The 6502 is also possibly the most studied processor, with die shots of polysilicon and metal found in VLSI textbooks and numerous simulators available online.

The only thing we haven’t seen, until now, is a version of the 6502 built out of discrete transistors. That’s what [Eric Schlaepfer] has been working on over the past year. It’s huge – 12 inches by 15 inches – has over four thousand individual components, and so far, this thing works. It’s not completely tested, but the preliminary results look good.

The MOnSter 6502 began as a thought experiment between [Eric] and [Windell Oskay], the guy behind Evil Mad Scientist and creator of the discrete 555 and dis-integrated 741 kits. After realizing that a few thousand transistors could fit on a single panel, [Eric] grabbed the netlist of the 6502 from Visual6502.org. With the help of several scripts, and placing 4,304 components into a board design, the 6502 was made dis-integrated. If you’re building a CPU made out of discrete components, it only makes sense to add a bunch of LEDs, so [Eric] threw a few of these on the data and address lines.

This is the NMOS version of the 6502, not the later, improved CMOS version. As such, this version of the 6502 doesn’t have all the instructions some programs would expect. The NMOS version is slower, more prone to noise, and is not a static CPU.

So far, the CPU is not completely tested and [eric] doesn’t expect it to run faster than a few hundred kilohertz, anyway. That means this gigantic CPU can’t be dropped into an Apple II or commodore; these computers need a CPU to run at a specific speed. It will, however, work in a custom development board.

Will the gigantic 6502 ever be for sale? That’s undetermined, but given the interest this project will receive it’s a foregone conclusion.

Correction: [Eric] designed the 555 and 741 kits

Hackaday Prize Entry: You Can Do Anything With A Bunch Of NANDs

Every few years, someone on the Internet builds a truly homebrew CPU. Not one built with a 6502, Z80, or a CPU from the 80s, either: one built completely out of 74-series logic chips or discrete transistor. We’re lucky enough to have [Alexander] document his build on Hackaday.io, and even luckier to have him enter it into this year’s Hackaday Prize. It’s an 8-bit computer built completely out of NAND gates.

Computers are just logic, and with enough NAND gates, you can do anything. That’s exactly what [Alex] is doing with this computer. It’s built entirely out of 74F00 chips – a ‘fast’ version of the ubiquitous quad 2-input NAND chip. The architecture of this computer borrows from the best CPUs of the 70s and 80s. The ALU is only four bits, like the Z80, but also uses the 6502 technique where the borrow is an inverted carry. It’s a small instruction set, a 2-stage pipeline, and should be able to compute one million instructions per second.

Designing a CPU is one thing, and thanks to Logisim, this is already done. Constructing a CPU is another matter entirely. For this, [Alex] is going for a module and backplane approach, where the ALU is constructed of a few identical modules tied together into a gigantic motherboard. [Alex] isn’t stopping at a CPU, either: he has a 16-byte ROM that’s programmed by plugging diodes into holes.

It’s an amazingly ambitious project, and for entering this project into the 2016 Hackaday Prize, [Alex] already netted himself $1000 and a trip to the final round of competition.

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Crawl, Walk, Run: A Starter CPU

Last time I talked about getting started with CPU design by looking at older designs before trying to tackle a more modern architecture. In particular, I recommended Caxton Foster’s Blue, even though (or maybe because) it was in schematic form. Even though the schematics are easy to understand, Blue does use a few dated constructs and you probably ought to build your take on the design using your choice of VHDL or Verilog.

In my case, my choice was Verilog. You can find my implementation of Blue on Opencores.org. I made quite a few changes to Foster’s original design. For example, armed with semiconductor memory, I managed to get all instructions to operate in one major cycle (which is, of course, 8 minor cycles). I also modernized the clock generation and added some resources and instructions.

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Moore’s Law is Over (Again)

According to this article in Nature, Moore’s Law is officially done. And bears poop in the woods.

Note when the time axis ends...
Note when the time axis ends…

There was a time, a few years back, when the constant exponential growth rate of the number of transistors packed into an IC was taken for granted: every two years, a doubling in density. After all, it was a “law” proposed by Gordon E. Moore, founder of Intel. Less a law than a production goal for a silicon manufacturer, it proved to be a very useful marketing gimmick.

Rumors of the death of Moore’s law usually stir up every couple years, and then Intel would figure out a way to pack things even more densely. But lately, even Intel has admitted that the pace of miniaturization has to slow down. And now we have confirmation in Nature: the cost of Intel continuing its rate of miniaturization is less than the benefit.

We’ve already gotten used to CPU speed increases slowing way down in the name of energy efficiency, so this isn’t totally new territory. Do we even care if the Moore’s-law rate slows down by 50%? How small do our ICs need to be?

Graph by [Wgsimon] via Wikipedia.

8-bit Computer Made Solely From NAND Gates

As an electronics rookie, one of the first things they tell you when they teach you about logic gates is, “You can make everything from a combination of NAND gates”. There usually follows a demonstration of simple AND, OR, and XOR gates made from NAND gates, and maybe a flip-flop or two. Then you move on, when you want a logic function you use the relevant device that contains it, and the nugget of information about NAND gates recedes to become just another part of your electronics general knowledge.

Not [Alexander Shabarshin] though. He’s set himself the task of creating an entire CPU solely from NAND gates, and he’s using 74F00 chips to give a hoped-for 1MIPS performance.  His design has an 8-bit data bus but a 4-bit ALU, and an impressive 2-stage pipeline and RISC instruction set which sets it apart from the computers most of us had when 74-series logic was a much more recent innovation. So far he has completed PCBs for a D-type flip-flop and a one-bit ALU, four of which will work in parallel in the final machine

Unsurprisingly, we have maintained a keen interest in TTL computers here at Hackaday for a very long time. You might say that we have featured so many for the subject to deserve a review article of its own. There is the ASAP-3, the Magic-1, the Duo Basic, the Apollo181, the unnamed CPU made by [Donn Stewart], the BMOW, and a clone of the Apollo Guidance Computer. But what sets [Alexander’s] project aside from all these fine machines is his bare-metal NAND-only design. The other 74-series CPU designers have had the full range of devices such as the 74181 ALU at their disposal. By studying the building blocks at this most fundamental level a deeper understanding can be gained of the inner workings of parts normally represented just as black boxes.

One of the briefs for writing a Hackaday article is that if the subject makes the writer stop and read rather than skim over it then it is likely to do so for the reader too. This project may not yet have delivered a working CPU, but its progress so far is interesting enough for an in-depth read. Definitely one to watch.