Last time I talked about getting started with CPU design by looking at older designs before trying to tackle a more modern architecture. In particular, I recommended Caxton Foster’s Blue, even though (or maybe because) it was in schematic form. Even though the schematics are easy to understand, Blue does use a few dated constructs and you probably ought to build your take on the design using your choice of VHDL or Verilog.
In my case, my choice was Verilog. You can find my implementation of Blue on Opencores.org. I made quite a few changes to Foster’s original design. For example, armed with semiconductor memory, I managed to get all instructions to operate in one major cycle (which is, of course, 8 minor cycles). I also modernized the clock generation and added some resources and instructions.






