In the first part of our series on in-band signaling, we discussed one of the most common and easily recognizable forms of audio control, familiar to anyone who has dialed a phone in the last fifty years – dual-tone multifrequency (DTMF) dialing. Our second installment will look at an in-band signaling method that far fewer people have heard, precisely because it was designed to be sub-audible — coded squelch systems for public service and other radio services. Continue reading “In-Band Signaling: Coded Squelch Systems”
There are some things that you think you know quite well because you learned them in your youth and you understand their principles of operation. Then along comes a link in your morning feed that reminds you of the limits of your knowledge, and you realize that there is a whole new level of understanding to be reached.
Take Phase Locked Loops (PLLs) for example. You learn how they work, you use them for frequency synthesis, and you know they can do other things like recover noisy clock lines and do FM demodulation. But then you read [Paul Lutus’] Understanding Phase-Locked Loops page, and a whole new vista opens.
He’s discussing PLLs in the context of software, as part of a weather fax decoder project, and this allows a perspective that was unavailable to those of us who learned about them through the medium of hardware such as the venerable 4046 CMOS chip. We can easily look at different PLLs with varying parameters, for example their use with a narrowband loop filter to retrieve signals buried in the noise, all through some straightforward code tweaks rather than extensive circuitry. It’s a page that’s a few years old now, but resources like this one do not age.
If PLLs are entirely new to you then you need to reat last year’s excellent PLL primer by Hackaday’s own [Al Williams].
[via Hacker News]
[PLL diagram: Chetvorno CC0]
One late night many decades ago, I chanced upon a technical description of the Touch-Tone system. The book I was reading had an explanation of how each key on a telephone sends a combination of two tones down the wire, and what’s more, it listed the seven audio frequencies needed for the standard 12-key dial pad. I gazed over at my Commodore 64, and inspiration hit — if I can use two of the C64’s three audio channels to generate the dual tones, I bet I can dial the phone! I sprang out of bed and started pecking out a Basic program, and in the wee hours I finally had it generating the recognizable Touch-Tones of my girlfriend’s phone number. I held the mouthpiece of my phone handset up to the speaker of my monitor, started the program, and put the receiver to my ear to hear her phone ringing! Her parents were none too impressed with my accomplishment since it came at 4:00 AM, but I was pretty jazzed about it.
Since that fateful night I’ve always wondered about how the Touch-Tone system worked, and in delving into the topic I discovered that it’s part of a much broader field of control technology called in-band signaling, or the use of audible or sub-audible signals to control an audio or video transmission. It’s pretty interesting stuff, even when it’s not used to inadvertently prank call someone in the middle of the night. Continue reading “In-Band Signaling: Dual-Tone Multifrequency Dialing”
[Avian] has been using STM32 ARM processors to sample RF for a variety of applications. At first, he was receiving relatively wide TV signals. Recently, though, he’s started dealing with very narrow signals and he found that his samples had a lot of spread in the frequency domain that he didn’t expect.
What followed was some detective work that resulted in a determination that phase noise was the culprit. But why? [Avian] took some measurements and noticed that the phase noise almost exactly matched the phase noise specification for the STM32’s phase locked loop (PLL).
Unfortunately, there didn’t seem to be a good way to avoid using the PLL without major changes to the rest of the circuit. However, it was quite the learning experience and something to be aware of when counting on built-in converters for high-accuracy measurements.
One of the best things about this post is the references to more information. There’s a great explanation of phase noise, as well as a specific application note about clock jitter and analog converters.
We’ve talked about phase noise in direct digital synthesis a few times. But usually, it is pretty obvious like when you are asking a CPU to double as an RF transmitter. [Avian’s] post was a bit more of a detective story.
If you want a stable oscillator, you usually think of using a crystal. The piezoelectric qualities of quartz means that it can be cut in a particular way that it will oscillate at a very precise frequency. If you present a constant load and keep the temperature stable, a crystal oscillator will maintain its frequency better than most other options.
There are downsides to crystals, though. As you might expect, because crystals are so stable it’s hard to change the frequency much when you want a different one. You can use a trimming capacitor to pull the frequency a little, but to really change frequency, you have to change crystals.
There are other kinds of oscillators that are more frequency agile. However, they aren’t usually as stable. To combine flexibility with crystal-like stability, you can use a Phase Locked Loop (PLL). Many modern systems use direct digital synthesis, but the PLL is a venerable and time-tested technique.
If you’re dealing with RF, you’ll probably have the need to generate a variety of clock signals. Fortunately, [Jason] has applied his knowledge to build a SI5351 library for the Arduino and a breakout board for the chip.
The SI5351 is a programmable clock generator. It can output up to eight unique frequencies at 8 kHz to 133 MHz. This makes it a handy tool for building up RF projects. [Jason]’s breakout board provides 3 isolated clock outputs on SMA connectors. A header connects to an Arduino, which provides power and control over I2C.
If you’re looking for an application, [Jason]’s prototype single-sideband radio shows the chip in action. This radio uses two of the SI5351 clocks: one for the VFO and one for the BFO. This reduces the part count, and could make this design quite cheap.
[Kenneth Finnegan] put up a lengthy primer on PLLs (Phase-Locked Loops). We really enjoyed his presentation (even the part where he panders to Rigol for a free scope… sign us up for one of those too). The concepts behind a PLL are not hard to understand, and [Kenneth] managed to come up with a handful of different demonstrations that really help to drive each point home.
A PLL is made up of three parts: a phase detector, a low pass filter, and a voltage controlled oscillator. It can do really neat things, like multiply clock speed (you see them in beefier chips like the ARM architecture all the time). The experiments seen in the video use a CD4046 chip which has two different types of phase detectors. The two signals displayed on the oscilloscope above compare the incoming clock signal with the output from the VCO. Depending on the type of phase detector used, and the quality of the low-pass filter, these might be tightly synchronized or wildly unstable. Find out why by watching the video embedded after the break.