Xcc700: Self-Hosted C Compiler For The ESP32/Xtensa

With two cores at 240 MHz and about 8.5 MB of non-banked RAM if you’re using the right ESP32-S3 version, this MCU seems at least in terms of specifications to be quite the mini PC. Obviously this means that it should be capable of self-hosting its compiler, which is exactly what [Valentyn Danylchuk] did with the xcc700 C compiler project.

Targeting the Xtensa Lx7 ISA of the ESP32-S3, this is a minimal C compiler that outputs relocatable ELF binaries. These binaries can subsequently be run with for example the ESP-IDF-based elf_loader component. Obviously, this is best done on an ESP32 platform that has PSRAM, unless your binary fits within the few hundred kB that’s left after all the housekeeping and communication stacks are loaded.

The xcc700 compiler is currently very minimalistic, omitting more complex loop types as well as long and floating point types, for starters. There’s no optimization of the final code either, but considering that it’s 700 lines of code just for a PoC, there seems to be still plenty of room for improvement.

BreezyBox: A BusyBox-Like Shell And Virtual Terminal For ESP32

Much like how BusyBox crams many standard Unix commands and a shell into a single executable, so too does BreezyBox provide a similar experience for the ESP32 platform. A demo implementation is also provided, which uses the ESP32-S3 platform as part of the Waveshare 7″ display development board.

Although it invokes the BusyBox name, it’s not meant to be as stand-alone as it uses the standard features provided by the FreeRTOS-based ESP-IDF SDK. In addition to the features provided by ESP-IDF it adds things like a basic virtual terminal, current working directory (CWD) tracking and a gaggle of Unix-style commands, as well as an app installer.

The existing ELF binary loader for the ESP32 is used to run executables either from a local path or a remote one, a local HTTP server is provided and you even get ANSI color support. Some BreezyBox apps can be found here, with them often running on a POSIX-compatible system as well. This includes the xcc700 self-hosted C compiler.

You can get the MIT-licensed code either from the above GitHub project link or install it from the Espressif Component Registry if that’s more your thing.

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Checking In On The ISA Wars And Its Impact On CPU Architectures

An Instruction Set Architecture (ISA) defines the software interface through which for example a central processor unit (CPU) is controlled. Unlike early computer systems which didn’t define a standard ISA as such, over time the compatibility and portability benefits of having a standard ISA became obvious. But of course the best part about standards is that there are so many of them, and thus every CPU manufacturer came up with their own.

Throughout the 1980s and 1990s, the number of mainstream ISAs dropped sharply as the computer industry coalesced around a few major ones in each type of application. Intel’s x86 won out on desktop and smaller servers while ARM proclaimed victory in low-power and portable devices, and for Big Iron you always had IBM’s Power ISA. Since we last covered the ISA Wars in 2019, quite a lot of things have changed, including Apple shifting its desktop systems to ARM from x86 with Apple Silicon and finally MIPS experiencing an afterlife in  the form of LoongArch.

Meanwhile, six years after the aforementioned ISA Wars article in which newcomer RISC-V was covered, this ISA seems to have not made the splash some had expected. This raises questions about what we can expect from RISC-V and other ISAs in the future, as well as how relevant having different ISAs is when it comes to aspects like CPU performance and their microarchitecture.

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The rust language logo being branded onto a microcontroller housing

Esp-hal, A Stable-API ESP32 HAL Gift For Your Rust Code

Looking to write Rust on the ESP32? You’re in luck, a new challenger has entered the scene, looking to help you write code that lasts – [Scott Mabin] and the team from Espressif have brought us the esp-hal 1.0.0-beta. From a personal project to an Espressif-sponsored one to an effort under Espressif’s wing, [Scott] tells us about the arduous journey of bringing first-class Rust support to ESP32 chips, Xtensa and RISC-V alike.

In particular, esp-hal, with the hal part standing for Hardware Abstraction Layer, focuses on providing you with a stable API to access hardware, making sure your code can remain stable for years to come. For now, you get drivers for GPIO, UART, SPI and I2C, as well as a number of auxiliary features like time and SoC reset, more than enough for a large amount of projects we hackers build with a generic MCU in mind.

Next stop? WiFi and BLE support, of course, an ESP32 just doesn’t feel the same without these two. Rust is a fun and seriously promising language, and it’s a joy to use! So, if you have a wireless-less project in mind and you’re looking for a HAL, try out the esp-hal, it might just be exactly what you need.

If you’re looking for examples, here’s an STM32 touchpad project with Rust firmware, a PIC32 Rust blinky demo, and we’ve even featured larger projects like this ESP32 open-source (reverse-engineered) WiFi MAC stack being written in Rust. In case you missed it, we’ve introduced Rust to you a couple of times, even as far as 2015!

SIMD-Accelerated Computer Vision On The ESP32-S3

One of the fun parts of the ESP32-S3 microcontroller is that it got upgraded to the newer Cadence Xtensa LX7 processor core, which turns out to have a range of SIMD instructions that can help to significantly speed up a range of tasks. [Shranav Palakurthi] recently used this to speed up the processing of video frames to detect corners using the FAST method. By moving some operations that benefit from SIMD over to an optimized version written in LX7 ASM, the algorithm’s throughput was increased by 220%, from 5.1 MP/s to 11.2 MP/s, albeit with some caveats.

The problem with the SIMD instructions in the LX7 other than them being very poorly documented – unless you sign an NDA with Cadence –  is that it misses many instructions that would be really useful. For [Shranav] the lack of support for direct misaligned reads and comparing of unsigned 8-bit numbers were hurdles, but could be worked around, with the results available on GitHub.

Much of the groundwork for this SIMD implementation was laid by [Larry Bank], who reverse-engineered the SIMD instructions from available documentation and code samples, finding that the ESP32-S3 misses quite a few common SIMD instructions, including various shifts and unaligned reads and writes. Still, it’s good enough for quite a few tasks, as long as you can make it work with the available instructions.

Linux, Running On Not A Lot

There are many possible answers to the question of what the lowest-powered hardware on which Linux could run might be, but it’s usually a pre-requisite for a Linux-capable platform to have a memory management unit, or MMU. That’s not the whole story though, because there are microcontroller-focused variants of the kernel which don’t require an MMU, including one for the Xtensa cores found on many Espressif chips. It’s this that [Naveen] is using to produce a computer which may not be the Linux computer with the lowest processor power, but could be the one consuming the least electrical power.

The result is definitely not a Linux powerhouse, but with its Arduino-sourced ESP32 board stacked on an UNO and I2C keyboard and display, it’s an extremely lightweight device. The question remains, though, is it more than a curiosity, and to what can it do? The chief advantage it has over its competitors such as the Raspberry Pi Zero comes in low power consumption, but can its cut-down Linux offer as much as a full-fat version? We are guessing that some commenters below will know the answer.

If you’re curious about the Xtensa version of Linux, it can be found here,

Much Better VGA From An ESP32

The ESP32 series from Espressif have been a successful line of products, offering a powerful microcontroller with on-chip wireless networking. There’s a snag though in their practice of calling all of them ESP32s despite wildly varying specifications and even different processor cores, such that it’s easy to lose track of exactly what the chip in front of you can do. [Bitluni] was faced with updating his VGA library to include a newer variant, and was pleasantly surprised to find that it includes a far more capable display peripheral which enables significantly higher resolutions than previously.

The part in question is the ESP32-S3, a version of the chip with the dual Extensa cores we’re familiar with from earlier versions, but the interesting addition of an LCD controller. His previous VGA on ESP32 used the I2S peripheral and sacrificed some of the available bits to create sync pulses, while this version is not only faster but also includes dedicated sync hardware. He can now do up to 16-bit colour in as much as 1024×768 resolution as can be seen in the video below the break, though this feat requires a slightly out of spec framerate that only works on some screens. It’s by no means perfect because the peripheral is intended for LCD rather than VGA use, but it’s pushing microcontroller VGA to new heights and we look forward to any other uses people will put it to.

We covered the original Bitluni ESP32 VGA library when it first appeared.

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