FPGA

384 Articles

[Gerry] holding up a DIP IC

Emulating A 74LS48 BCD-to-7-Segment Decoder/Driver With An Altera MAX 7000 “S” Series Complex Programmable Logic Device

November 11, 2025 by 25 Comments

Over on the [Behind The Code with Gerry] YouTube channel our hacker [Gerry] shows us how to emulate a 74LS48 BCD-to-7-segment decoder/driver using an Altera CPLD Logic Chip From 1998.

This is very much a das blinkenlights kind of project. The goal is to get a 7-segment display to count from 0 to 9, and that’s it. [Gerry] has a 74LS193 Up/Down Binary Counter, a 74LS42 BCD to Decimal Decoder, and some 74LS00 NAND gates, but he “doesn’t have” an 74LS48 to drive the 7-segment display so he emulates one with an old Altera CPLD model EPM7064SLC44 which dates back to the late nineties. A CPLD is a Complex Programmable Logic Device which is a kind of precursor to FPGA technology.

Continue reading “Emulating A 74LS48 BCD-to-7-Segment Decoder/Driver With An Altera MAX 7000 “S” Series Complex Programmable Logic Device” →

An FPGA-Based Mechanical Keyboard

October 1, 2025 by 16 Comments

You can buy all kinds of keyboards these days, from basic big-brand stuff to obscure mechanical delicacies from small-time builders. Or, you can go the maker route, and build your own. That’s precisely what [Lambert Sartory] did with their Clavier build.

This build goes a bit of a different route to many other DIY keyboards out there, in that [Lambert] was keen to build it around an FPGA instead of an off-the-shelf microcontroller. To that end, the entire USB HID stack was implemented in VHDL on a Lattice ECP5 chip. It was a heavy-duty way to go, but it makes the keyboard quite unique compared to those that just rely on existing HID libraries to do the job. This onboard hardware also allowed [Lambert] to include JTAG, SPI, I2C, and UART interfaces right on the keyboard, as well as a USB hub for good measure.

As for the mechanical design, it’s a full-size 105-key ISO keyboard with one bonus key for good measure. That’s the coffee key, which either locks the attached computer when you’re going for a break, or resets the FPGA with a long press just in case it’s necessary. It’s built with Cherry MX compatible switches, has N-key rollover capability, and a mighty 1000 Hz polling rate. If you can exceed that by hand, you’re some sort of superhuman.

The great thing about building your own keyboard is you can put in whatever features you desire. If you’re whipping up your own neat interface devices, don’t hesitate to let us know!

Retro X86 With 486Tang

September 14, 2025 by 4 Comments

Tang FPGA boards are affordable, and [nand2mario] has been trying to get an x86 core running on one for a while. Looks like it finally worked out, as there is an early version of the ao486 design on a Tang FPGA board using a Gowin device. That core’s available on the MiSTer platform, which emulates games using an Altera Cyclone device.

Of course, porting something substantial between FPGA architectures is not trivial. In addition, [nand2mario] made some changes. The original core uses DDR3 memory, but for the Tang and the 486, SDRAM makes more sense. The only problem is that the Tang’s SDRAM is 16 bits wide, which would imply you need two cycles per 32-bit access. To mitigate this, the memory system runs at twice the main clock frequency. Of course, that’s kind of double data rate, but not in the same way as DDR memory.

Continue reading “Retro X86 With 486Tang” →

Front and back view of the 13.7" monitor kit

Modos Is Open Hardware, Easy On The Eyes

September 8, 2025 by 26 Comments

Since e-ink first hit the market a couple decades back, there’s always murmurs of “that’d be great as a second monitor”— but very, very few monitors have ever been made. When the commecial world is delivering very few options, it leaves room for open source hardware projects, like the Modos Glider and Paper Monitor, projects now seeking funding on Crowd Supply.

As far as PC monitors go, the Modos isn’t going to win many awards on specs alone. The screen is only 13.3″ across, and its resolution maxes out at 1600 x 1200. The refresh rate would be totally unremarkable for a budget LCD, at 75 Hz. This Paper Monitor isn’t an LCD, budget or otherwise, and for e-ink, 75 Hz is a blazing fast refresh rate. Continue reading “Modos Is Open Hardware, Easy On The Eyes” →

FPGA Brings UNIX V1 To The DEC J-11

August 30, 2025 by 13 Comments

If you’ve never used a PDP-11 before it’s probably because you simply weren’t around in the 70s and 80s. Although they started as expensive machines only in research labs and industry, they eventually became much more accessible. They’re a bit of a landmark in computing history, too, being largely responsible for the development of things like UNIX and the C programming language. [ryomuk] is using an FPGA in combination with an original DEC J-11 to bring us a new take on this machine. (Google Translate from Japanese)

The FPGA used in this build is a Tang Nano 20k, notable for its relatively low cost. The FPGA emulates the memory system and UART of a PDP-11 system down to the instruction set, while the original, unmodified DEC chip is left to its own devices. After some initial testing [ryomuk] built a PC11 paper tape emulator to ensure the system was working which runs a version of BASIC from the era. The next thing up was to emulate some disk drives and co-processors so that the machine can run the first version of UNIX. 

[ryomuk] also developed a PCB for the DEC microprocessor and the FPGA to sit on together, and it includes all of the jumpers and wiring needed to allow the computer to run UNIX, as well as handling other miscellaneous tasks like power. It’s an interesting build that gets to the heart of the early days of computer science. PDP-11 computers did eventually get smaller and more accessible, and if you want to build a modern version this build fits a complete system into an ATX case.

Thanks to [RetepV] for the tip!

The 32 Bit 6502 You Never Had

August 24, 2025 by 43 Comments

In the beginning was the MOS6502, an 8-bit microprocessor that found its way into many famous machines. Some of you will know that a CMOS 6502 was created by the Western Design Center, and in turn, WDC produced the 65C816, a 16-bit version that was used in the Apple IIgs as well as the Super Nintendo. It was news to us that they had a 32-bit version in their sights, but after producing a datasheet, they never brought it to market. Last October, [Mike Kohn] produced a Verilog version of this W65C832 processor, so it can be experienced via an FPGA.

The description dives into the differences between the 32, 16, and 8-bit variants of the 6502, and we can see some of the same hurdles that must have faced designers of other chips in that era as they moved their architectures with the times while maintaining backwards compatibility. From our (admittedly basic) understanding it appears to retain that 6502 simplicity in the way that Intel architectures did not, so it’s tempting to imagine what future might have happened had this chip made it to market. We’re guessing that you would still be reading through an Intel or ARM, but perhaps we might have seen a different path taken by 1990s game consoles.

If you’d like to dive deeper into 6502 history, the chip recently turned 50.

Thanks [Liam Proven] for the tip.

Circuit diagram of linear-feedback shift register.

Can We Replace A Program Counter With A Linear-Feedback Shift Register? Yes We Can!

May 31, 2025 by 32 Comments

Today we heard from [Richard James Howe] about his new CPU. This new 16-bit CPU is implemented in VHDL for an FPGA.

The really cool thing about this CPU is that it eschews the typical program counter (PC) and replaces it with a linear-feedback shift register (LFSR). Apparently an LFSR can be implemented in hardware with fewer transistors than are required by an adder.

Usually the program counter in your CPU increments by one, each time indicating the location of the next instruction to fetch and execute. When you replace your program counter with an LFSR it still does the same thing, indicating the next instruction to fetch and execute, but now those instructions are scattered pseudo-randomly throughout your address space!

Continue reading “Can We Replace A Program Counter With A Linear-Feedback Shift Register? Yes We Can!” →