The Intel 8087 And Conditional Microcode Tests

January 11, 2026 by 19 Comments

Continuing his reverse-engineering of the Intel 8087, [Ken Shirriff] covers the conditional tests that are implemented in the microcode of this floating point processing unit (FPU). This microcode contains the details on how to perform the many types of specialized instructions, like cos and arctan, all of which decode into many microcode ops. These micro ops are executed by the microcode engine, which [Ken] will cover in more detail in an upcoming article, but which is effectively its own CPU.

Conditional instructions are implemented in hardware, integrating the states of various functional blocks across the die, ranging from the instruction decoder to a register. Here, the evaluation is performed as close as possible to the source of said parameter to save on wiring.

Implementing this circuitry are multiplexers, with an example shown in the top die shot image. Depending on the local conditions, any of four pass transistors is energized, passing through that input. Not shown in the die shot image are the inverters or buffers that are required with the use of pass transistors to amplify the signal, since pass transistors do not provide that feature.

Despite how firmly obsolete the 8087 is today, it still provides an amazing learning opportunity for anyone interested in ASIC design, which is why it’s so great that [Ken] and his fellow reverse-engineering enthusiasts keep plugging away at recovering all this knowledge.

The Full-Sized 32-Wheeled, Articulated Bus Built For A 1976 Movie

January 8, 2026 by 70 Comments

Regardless of what your opinion is on cult-classic movies that got mixed-to-negative box office reviews when they were released, you have to admire the ones that went all out on practical effects and full-size constructions rather than CGI and scale models. Case in point the 1976 satirical comedy film The Big Bus that featured an absolutely massive articulated double-decker bus. With 32 wheels and multiple levels you’d think that a scale model would be used since most interior shots were done in the studio, but instead they built a real bus.

In this video by [Timeworn lengends] the genesis and details of the vehicle are covered. At the core of this road-worthy bus are two cabover International trucks, which were temporarily attached with a quick-release mechanism and required a second driver for the rear section who followed radio instructions for steering. In 1976 dollars, the entire bus prop cost between $250,000 and $500,000 USD to construct — making it one of the most expensive props ever made, especially considering the relatively low budget.

A fiberglass shell gave the bus its characteristic design, with the over the top ‘nuclear reactor’ propulsion befitting the comedy satire. Although the bowling alley and swimming pool were not really inside the bus, there was a functional bar installed along with the functional cockpit at the front.

Despite the movie flopping at the box office and critics being very mixed on its merits, it’s hard to deny that this bus prop is very unique and probably has a big part in why the movie has become a cult classic. As for the closest real-life equivalent, there is the articulated, double-decker Neoplan Jumbocruiser, which had its own troubled history.

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Teardown Of Boeing 777 Cabin Pressure Control System

January 3, 2026 by 24 Comments

Modern passenger airliners are essentially tubes-with-wings, they just happen to be tubes that are stuffed full with fancy electronics. Some of the most important of these are related to keeping the bits of the tube with humans inside it at temperatures and pressures that keeps them alive and happy. Case in point the Boeing 777, of which [Michel] of Le Labo de Michel on YouTube recently obtained the Cabin Pressure Control System (CPCS) for a teardown.

The crucial parts on the system are the two Nord-Micro C0002 piezo resistive pressure transducers, which measure the pressure inside the aircraft. These sensors, one of which is marked as ‘backup’, are read out by multiple ADCs connected to a couple of FPGAs. The system further has an ARINC 429 transceiver, for communicating with the other avionics components. Naturally the multiple PCBs are conformally coated and with vibration-proof interconnects.

Although it may seem like a lot of hardware just to measure air pressure with, this kind of hardware is meant to work without errors over the span of years, meaning significant amounts of redundancy and error checking has to be built-in. Tragic accidents such as Helios Airways Flight 522 involving a 737-300 highlight the importance of these systems. Although in that case human error had disabled the cabin pressurization, it shows just how hard it can be to detect hypoxia before it is too late.

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Xcc700: Self-Hosted C Compiler For The ESP32/Xtensa

December 30, 2025 by 21 Comments

With two cores at 240 MHz and about 8.5 MB of non-banked RAM if you’re using the right ESP32-S3 version, this MCU seems at least in terms of specifications to be quite the mini PC. Obviously this means that it should be capable of self-hosting its compiler, which is exactly what [Valentyn Danylchuk] did with the xcc700 C compiler project.

Targeting the Xtensa Lx7 ISA of the ESP32-S3, this is a minimal C compiler that outputs relocatable ELF binaries. These binaries can subsequently be run with for example the ESP-IDF-based elf_loader component. Obviously, this is best done on an ESP32 platform that has PSRAM, unless your binary fits within the few hundred kB that’s left after all the housekeeping and communication stacks are loaded.

The xcc700 compiler is currently very minimalistic, omitting more complex loop types as well as long and floating point types, for starters. There’s no optimization of the final code either, but considering that it’s 700 lines of code just for a PoC, there seems to be still plenty of room for improvement.

Reverse-Engineering The Intel 8087 Stack Circuitry

December 19, 2025 by 3 Comments

Although something that’s taken for granted these days, the ability to perform floating-point operations in hardware was, for the longest time, something reserved for people with big wallets. This began to change around the time that Intel released the 8087 FPU coprocessor in 1980, featuring hardware support for floating-point arithmetic at a blistering 50 KFLOPS. Notably, the 8087 uses a stack-based architecture, a major departure from existing FPUs. Recently [Ken Shirriff] took a literal closer look at this stack circuitry to see what it looks like and how it works.

Nearly half of the 8087’s die is taken up by the microcode frontend and bus controller, with a block containing constants like π alongside the FP calculation-processing datapath section taking up much of the rest. Nestled along the side are the eight registers and the stack controller. At 80 bits per FP number, the required registers and related were pretty sizeable for the era, especially when you consider that the roughly 60,000 transistors in the 8087 were paired alongside the 29,000 transistors in the 16-bit 8086.

Each of the 8087’s registers is selected by the decoded instructions via a lot of wiring that can still be fairly easily traced despite the FPU’s die being larger than the CPU it accompanied. As for the unique stack-based register approach, this turned out to be mostly a hindrance, and the reason why the x87 FP instructions in the x86 ISA are still quite maligned today. Yet with careful use, providing a big boost over traditional code, this made it a success by that benchmark, even if MMX, SSE, and others reverted to a stackless design.

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Hackaday Links: December 7, 2025

December 7, 2025 by 17 Comments

We stumbled upon a story this week that really raised our eyebrows and made us wonder if we were missing something. The gist of the story is that U.S. Secretary of Energy Chris Wright, who has degrees in both electrical and mechanical engineering, has floated the idea of using the nation’s fleet of emergency backup generators to reduce the need to build the dozens of new power plants needed to fuel the AI data center building binge. The full story looks to be a Bloomberg exclusive and thus behind a paywall — hey, you don’t get to be a centibillionaire by giving stuff away, you know — so we might be missing some vital details, but this sounds pretty stupid to us.

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Mac System 7 On A G4? Why Not!

December 5, 2025 by 13 Comments

Over the many years Apple Computer have been in operation, they have made a success of nearly-seamlessly transitioning multiple times between both operating systems and their underlying architecture. There have been many overlapping versions, but there’s always a point at which a certain OS won’t run on newer hardware. Now [Jubadub] has pushed one of those a little further than Apple intended, by persuading classic Mac System 7 to run on a G4.

System 7 was the OS your Mac would have run some time in the mid ’90s, whether it was a later 68000 machine or a first-gen PowerMac. In its day it gave Windows 3.x and even 95 a run for their money, but it relied on an older Mac ROM architecture than the one found on a G4. The hack here lies in leaked ROMS, hidden backwards compatibility, and an unreleased but preserved System 7 version originally designed for the ’90s Mac clone programme axed by Steve Jobs.  It’s not perfect, but they achieved the impossible.

As to why, it seems there’s a significant amount of software that needs 7 to run, something mirrored in the non-Mac retrocomputing world. Even this hack isn’t the most surprising System 7 one we’ve seen recently, as an example someone even made a version for x86 machines.

Thumbnail Image Art: Apple PowerMac G4 by baku13, CC BY-SA 3.0