Is That A Large Smartwatch? Or A Tiny Cray?

June 21, 2024 by Al Williams 6 Comments

While we aren’t typically put off by a large wristwatch, we were taken a bit aback by [Chris Fenton]’s latest timepiece — if you can call it that. It’s actually a 1/25th-scale Cray C90 worn as a wristwatch. The whole thing started with [Chris] trying to build a Cray in Verilog. He started with a Cray-1 but then moved to a Cray X-MP, which is essentially a Cray-1 with two extra address bits. Then he expanded it to 32 bits, which makes it a Cray Y-MP/C90/J90 core. As he puts it, “If you wanted something practical, go read someone else’s blog.”

The watch emulates a Cray C916 and uses a round OLED display on the top. While the move from 22 to 32 address bits sounds outdated, keep in mind the Cray addresses 64-bit words exclusively, so we’re talking access to 32 gigabytes of memory. The hardware consists of an off-the-shelf FPGA board and a Teensy microcontroller to handle mundane tasks like driving the OLED display and booting the main CPU. Interestingly, the actual Cray 1A used Data General computers for a similar task.

Of course, any supercomputer needs a super program, so [Chris] uses the screen to display a full simulation of Jupiter and 63 of its moons. The Cray excels at programs like this because of its vector processing abilities. The whole program is 127 words long and sustains 40 MFLOPs. Of course, that means to read the current time, you need to know where Jupiter’s moons are at all times so you can match it with the display. He did warn us this would not be practical.

While the Cray wouldn’t qualify as a supercomputer today, we love learning about what was state-of-the-art not that long ago. Cray was named, of course, after [Seymour Cray] who had earlier designed the Univac 1103, several iconic CDC computers, and the Cray computers, of course.

The Apple Silicon That Never Was

June 3, 2023 by Bryan Cockfield 20 Comments

Over Apple’s decades-long history, they have been quick to adapt to new processor technology when they see an opportunity. Their switch from PowerPC to Intel in the early 2000s made Apple machines more accessible to the wider PC world who was already accustomed to using x86 processors, and a decade earlier they moved from Motorola 68000 processors to take advantage of the scalability, power-per-watt, and performance of the PowerPC platform. They’ve recently made the switch to their own in-house silicon, but, as reported by [The Chip Letter], this wasn’t the first time they attempted to design their own chips from the ground up rather than using chips from other companies like Motorola or Intel.

In the mid 1980s, Apple was already looking to move away from the Motorola 68000 for performance reasons, and part of the reason it took so long to make the switch is that in the intervening years they launched Project Aquarius to attempt to design their own silicon. As the article linked above explains, they needed a large amount of computing power to get this done and purchased a Cray X-MP/48 supercomputer to help, as well as assigning a large number of engineers and designers to see the project through to the finish. A critical error was made, though, when they decided to build their design around a stack architecture rather than a RISC. Eventually they switched to a RISC design, though, but the project still had struggled to ever get a prototype working. Eventually the entire project was scrapped and the company eventually moved on to PowerPC, but not without a tremendous loss of time and money.

Interestingly enough, another team were designing their own architecture at about the same time and ended up creating what would eventually become the modern day ARM architecture, which Apple was involved with and currently licenses to build their M1 and M2 chips as well as their mobile processors. It was only by accident that Apple didn’t decide on a RISC design in time for their personal computers. The computing world might look a lot different today if Apple hadn’t languished in the early 00s as the ultimate result of their failure to develop a competitive system in the mid 80s. Apple’s distance from PowerPC now doesn’t mean that architecture has been completely abandoned, though.

Thanks to [Stephen] for the tip!

A History Of NASA Supercomputers, Among Others

May 5, 2023 by Dave Rowntree 8 Comments

The History Guy on YouTube has posted an interesting video on the history of the supercomputer, with a specific focus on their use by NASA for the implementation of computational fluid dynamics (CFD) models of aeronautical assemblies.

The aero designers of the day were quickly finding out the limitations of the wind tunnel testing approach, especially for so-called transonic flow conditions. This occurs when an object moving through a fluid (like air can be modeled) produces regions of supersonic flow mixed in with subsonic flow and makes for additional drag scenarios. This severely impacts aircraft performance. Not accounting for these effects is not an option, hence the great industry interest in CFD modeling. But the equations for which (usually based around the Navier-Stokes system) are non-linear, and extremely computationally intensive.

Obviously, a certain Mr. Cray is a prominent player in this story, who, as the story goes, exhausted the financial tolerance of his employer, CDC, and subsequently formed Cray Research Inc, and the rest is (an interesting) history. Many Cray machines were instrumental in the development of the space program, and now adorn computing museums the world over. You simply haven’t lived until you’ve sipped your weak lemon drink whilst sitting on the ‘bench’ around an early Cray machine.

You see, supercomputers are a different beast from those machines mere mortals have access to, or at least the earlier ones were. The focus is on pure performance, ideally for floating-point computation, with cost far less of a concern, than getting to the next computational milestone. The Cray-1 for example, is a 64-bit machine capable of 80 MIPS scalar performance (whilst eating over 100 kW of juice), and some very limited parallel processing ability.

While this was immensely faster than anything else available at the time, the modern approach to supercomputing is less about fancy processor design and more about the massive use of parallelism of existing chips with lots of local fast storage mixed in. Every hacker out there should experience these old machines if they can, because the tricks they used and the lengths the designers went to get squeeze out every ounce of processing grunt, can be a real eye-opener.

Want to see what happens when you really push out the boat and use the whole wafer for parallel computation? Checkout the Cerberus. If your needs are somewhat less, but dabbling in parallel computing gets you all pumped, you could build a small array out of Pine64s. Finally, the story wouldn’t be complete without talking about the life and sad early demise of Seymour Cray.
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Parallel Computing On The PicoCray RP2040 Cluster

April 9, 2023 by Joseph Long 28 Comments

[ExtremeElectronics] cleverly demonstrates that if one Raspberry Pi Pico is good, then nine must be awesome. The PicoCray project connects multiple Raspberry Pi Pico microcontroller modules into a parallel architecture leveraging an I2C bus to communicate between nodes.

The same PicoCray code runs on all nodes, but a grounded pin on one of the Pico modules indicates that it is to operate as the controller node. All of the remaining nodes operate as processor nodes. Each processor node implements a random back-off technique to request an address from the controller on the shared bus. After waiting a random amount of time, a processor will check if the bus is being used. If the bus is in use, the processor will go back to waiting. If the bus is not in use, the processor can request an address from the controller.

Once a processor node has an address, it can be sent tasks from the controller node. In the example application, these tasks involve computing elements of the Mandelbrot Set. The particular elements to be computed in a given task are allocated by the controller node which then later collects the results from each processor node and aggregates the results for display.

The name for this project is inspired by Seymore Cray. Our Father of the Supercomputer biography tells his story including why the Cray-1 Supercomputer was referred to as “the world’s most expensive loveseat.” For even more Cray-1 inspiration, check out this Raspberry Pi Zero Cluster.

Cray X-MP serial number 302 being assembled (Credit: Andy Gelme)

Running Cray OS And UNICOS On Your Own Cray Simulator Instance

January 23, 2023 by Maya Posch 38 Comments

The Cray series of super computers have been pretty much symbolic for high-powered computing since the 1970s, and to this day there’s a certain level of mysticism to them. Much of this is also helped by how rare these systems were and are today. Unlike Commodore, Apple and IBM PC systems which got sold by the truckload, Cray super computers and the much smaller workstation systems were and are significantly more rare. Despite or perhaps because of this [Andras Tantos] embarked on a decade-long quest to bring together what is left of the Cray legacy in the form of the Cray Files.

Part of this is a Cray system simulator that can be found on GitHub as well as online. This simulator allows you to run software written for the Cray X-MP (1982), Y-MP (1988), J90 (1994) and SV1 (1998), which covers essentially all major Cray systems after the Cray 1 and up till when Cray had become part of SGI in 1996. Described in the blog is the extensive archaeological work [Andras] had to undertake to unearth and resurrect these systems. Along the way he got a few lucky breaks, such as when finding two UNICOS CD images on Archive.org, and when people who used to work with Cray systems still had software and such lying around, along with the treasure trove of knowledge contained in their memories.

Although these Cray computer systems are as solidly obsolete as SGI and Sun’s once high-end systems of the 1990s are today, very few would have gotten a chance to use any of those systems, which makes it even more important that they are preserved. As an ongoing project, [Andras] is asking for anyone who might be able to fill in some of the remaining blanks to contact him.

[Heading photo: Cray X-MP serial number 302 being assembled (Credit: Andy Gelme)]

Cluster Your Pi Zeros In Style With 3D Printed Cray-1

March 21, 2022 by Tom Nardi 36 Comments

From a performance standpoint we know building a homebrew Raspberry Pi cluster doesn’t make a lot of sense, as even a fairly run of the mill desktop x86 machine is sure to run circles around it. That said, there’s an argument to be made that rigging up a dozen little Linux boards gives you a compact and affordable playground to experiment with things like parallel computing and load balancing. Is it a perfect argument? Not really. But if you’re anything like us, the whole thing starts making a lot more sense when you realize your cluster of Pi Zeros can be built to look like the iconic Cray-1 supercomputer.

This clever 3D printed enclosure comes from [Kevin McAleer], who says he was looking to learn more about deploying software using Ansible, Docker, Flask, and other modern frameworks with fancy sounding names. After somehow managing to purchase a dozen Raspberry Pi Zero 2s, he needed a way to keep them all in a tidy package. Beyond looking fantastically cool, the symmetrical design of the Cray-1 allowed him to design his miniature version in such a way that each individual wedge is made up of the same identical set of 3D printed parts.

In the video after the break, [Kevin] explains some of the variations the design went through. We appreciate his initial goal of making it so you didn’t need any additional hardware to assemble the thing, but in the end you’ll need to pick up some M2.5 standoffs and matching screws if you want to build one yourself. We particularly like how you can hide all the USB power cables inside the lower “cushion” area with the help of some 90-degree cables, leaving the center core open.

This isn’t the first time we’ve seen somebody build their own tiny Cray-1. A particularly dedicated hacker built his own 1/10th scale replica of the 1970s supercomputer powered by an FPGA back in 2010, and eventually got to the point of trying to boot original software on it.

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The Descendants Of Ancient Computers

May 31, 2020 by Bryan Cockfield 13 Comments

Building computers from discrete components is a fairly common hobby project, but it used to be the only way to build a computer until integrated circuits came on the scene. If you’re living in the modern times, however, you can get a computer like this running easily enough, but if you want to dive deep into high performance you’ll need to understand how those components work on a fundamental level.

[Tim] and [Yann] have been working on replicating circuitry found in the CDC6600, the first Cray supercomputer built in the 1960s. Part of what made this computer remarkable was its insane (for the time) clock speed of 10 MHz. This was achieved by using bipolar junction transistors (BJTs) that were capable of switching much more quickly than typical transistors, and by making sure that the support circuitry of resistors and capacitors were tuned to get everything working as efficiently as possible.

The duo found that not only are the BJTs used in the original Cray supercomputer long out of production, but the successors to those transistors are also out of production. Luckily they were able to find one that meets their needs, but it doesn’t seem like there is much demand for a BJT with these characteristics anymore.

[Tim] also posted an interesting discussion about some other methods of speeding up circuitry like this, namely by using reach-through capacitors and Baker clamps. It’s worth a read in its own right, but if you want to see some highlights be sure to check out this 16-bit computer built from individual transistors.