Tic-Tac-Toe, In TTL

June 29, 2019 by Jenny List 15 Comments

We’ll all be familiar with Tic-Tac-Toe, or Noughts and Crosses, a childhood pencil-and-paper diversion which has formed the basis of many a coding exercise. It’s an easy enough task to implement in software, but how many of us have seen it done in hardware alone? That’s just what [Warren Toomey] has done using TTL chips, and his method makes for a surprisingly simple circuit.

At its heart is an 8 kB ROM that contains precomputed move sequences that are selected via an address composed of the game states for both player and machine. A series of flip-flops control and buttons to make the board, and a 555 provides a clock.

The technique of using a ROM to replace complex logic is a very powerful one that is facilitated by the low price of relatively large devices that would once have been unaffordable. We’ve seen the technique used elsewhere, including as an ALU in a TTL CPU, and even for an entire CPU in its own right.

You can see the result in operation in the video below the break, and should you wish to have a go for yourself all the relevant information can be found in a GitHub repository.

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A TTL CPU, Minimising Its Chip Count

June 23, 2019 by Jenny List 19 Comments

By now we should all be used to the astonishing variety of CPUs that have come our way created from discrete logic chips. We’ve seen everything from the familiar Von Neumann architectures to RISC and ever transport-triggered architecture done in 74 TTL derivatives, and fresh designs remain a popular project for many people with an interest in the inner workings of a computer.

[Warren Toomey]’s CSCvon8 is an interesting machine that implements an 8-bit computer with a 64-bit address space using only 17 chips, and without resorting to any tricks involving microcontrollers. It implements a fairly conventional Von Neumann architecture using TTL with a couple of tricks that use modern chips but could have been done in the same way in decades past. Instruction microcode is stored in an EEPROM, and the ALU is implemented in a very large EPROM that would probably once have been eye-wateringly expensive. This in particular removes many discrete TTL chips from the total count, in the absence of the classic 74181 single-chip part. To make it useful there is 32k each of RAM and EEPROM, and also a UART for serial access. The whole is brought together on a neat PCB, and there is a pile of demo code to get started with. Everything can be found in the project’s GitHub repository.

At the start of this article we mentioned a couple of unconventional TTL CPUs. The transport triggered one we featured in 2017, and the RISC one is the Gigatron which has appeared here more than once.

A Full-Stack Web Browser

May 14, 2019 by Brian Benchoff 13 Comments

Interviewing to be a full-stack engineer is hard. It’s a lot harder than applying for a junior dev job where you’re asked to traverse a red-black tree on a whiteboard. For the full-stack job, they just give you a pile of 2N2222 transistors. (The first company wasn’t a great fit, and I eventually found a place that gave me some 2N2907s for the interview.) That said, there’s a certain challenge in seeing how far you can push some doped silicon. Case in point, [Alastair Hewitt]. He’s building a computer to browse the world wide web from the gate level up.

The goal of this project is to browse the web using only TTL logic. This presents problems that aren’t readily apparent at first glance. First up is being able to display text on a screen. The easiest way to do this now is to get a whole bunch of modern memories that are astonishingly fast for a 1970s vintage computer. This allows for VGA output, and yes, we’ve seen plenty of builds that output VGA using some big honkin’ memories. It turns out these RAM and ROM chips are a little better than the specs say they are, and this computer is overclocked from the very beginning.

A bigger problem is how to interface with a network. This is a problem for very old computers, but PPP still exists and if you have the software stack you can read something from a server over a serial connection. [Alistar] actually found the UART frequency was more important than the dot clock frequency of VGA, and the system clock must therefore be built around the serial port, not the display interface. This means the text mode interface is actually 96 columns instead of the usual 80 columns.

It’s very easy to say that you’re building a computer on a bread board. It’s another thing entirely to actually do it. This is actually a surprisingly well-though out sketch of a computer system that will, theoretically, be able to connect to the Internet. Of course, the reality of the situation is that this computer will be connecting over serial to a computer that’s connected to the Internet, but there’s no shame in that. You can check out the progress on the GitHub for this project.

A 6502 Computer, With Acres Of Breadboard And Dozens Of Chips

April 4, 2019 by Dan Maloney 49 Comments

Imagine you’re time-warped back to 1979 and tasked with constructing a personal computer. Could you do it? [RadicalBrad] thinks he can, and his 6502-based “Super VIC” build looks like it’s off to a great retrocomputing start.

Most emulations of old hardware these days go the FPGA route, and while we respect those projects immensely, there’s something to be said for applying a highly artificial constraint at the outset of a project. [RadicalBrad] chose to design like it’s 1979, and limited his ode to the machines of his youth to the 6502 CPU and logic and RAM chips available before 1980. The computer will support NTSC video output and 4-channels of 8-bit sound. No circuit boards will be used – everything is to be assembled on solderless breadboards. So far he has 48 (!) of them ganged together, which sounds like an enormous amount of space to work with, but he still found things crowded enough that some of the DIP bodies were trimmed a bit to fit more closely on the breadboards. The SRAM posed a problem, though, in that the 512K chips he wanted were not available in DIPs. To stay faithful to the constraints, he soldered the SOJ-packaged RAM chips into 40-PIN DIP headers – all 25 chips! We can’t recall a PC of the era sporting 12 megabytes of RAM, but no matter – it’s too cool not to love.

[RadicalBrad] has his work cut out for him, and this could take years to finish. We’re keen to follow his progress and can’t wait till it boots for the first time. Until it does, we’ll just gaze upon such discrete computing wonders as this almost-as-simple-as-possible computer, or even this delightfully noisy adder for a relay computer.

How The Gigatron TTL Microcomputer Works

March 25, 2019 by Jenny List 26 Comments

About a year ago when Hackaday and Tindie were at Maker Faire UK in Newcastle, we were shown an interesting retrocomputer by a member of York Hackspace. The Gigatron is a fully functional home computer of the type you might have owned in the early 1980s, but its special trick is that it does not contain a microprocessor. Instead of a 6502, Z80, or other integrated CPU it only has simple TTL chips, it doesn’t even contain the 74181 ALU-in-a-chip. You might thus expect it to have a PCB the size of a football pitch studded with countless chips, but it only occupies a modest footprint with 36 TTL chips, a RAM, and a ROM. Its RISC architecture provides the explanation, and its originator [Marcel van Kervinck] was recently good enough to point us to a video explaining its operation.

It was recorded at last year’s Hacker Hotel hacker camp in the Netherlands, and is delivered by the other half of the Gigatron team [Walter Belgers]. In it he provides a fascinating rundown of how a RISC computer works, and whether or not you have any interest in the Gigatron it is still worth a watch just for that. We hear about the design philosophy and the choice of a Harvard architecture, explained the difference between CISC and RISC, and we then settle down for a piece-by-piece disassembly of how the machine works. The format of an instruction is explained, then the detail of their 10-chip ALU.

The display differs from a typical home computer of the 1980s in that it has a full-color VGA output rather than the more usual NTSC or PAL. The hardware is simple enough as a set of 2-bit resistor DACs, but the tricks to leave enough processing time to run programs while also running the display are straight from the era. The sync interval is used to drive another DAC for audio, for example.

The result is one of those what-might-have-been moments, a glimpse into a world in which RISC architectures arrived at the consumer level years earlier than [Sophie Wilson]’s first ARM design for an Acorn Archimedes. There’s no reason that a machine like this one could not have been built in the late 1970s, but as we know the industry took an entirely different turn. It remains then the machine we wish we’d had in the early 1980s, but of course that doesn’t stop any of us having one now. You can buy a Gigatron of your very own, and once you’ve soldered all those through-hole chips you can run the example games or get to grips with some of the barest bare-metal RISC programming we’ve seen. We have to admit, we’re tempted!

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The 7400 Quad 2-Input NAND Gate, A Neglected Survivor From A Pre-Microprocessor World

December 28, 2018 by Jenny List 62 Comments

There are a range of integrated circuits that most of us would regard as definitive examples of their type, devices which became the go-to for a particular function and which have entered our collective consciousness as electronics enthusiasts. They have been in production since the early days of consumer integrated circuits, remaining in use because of a comprehensive understanding of their characteristics among engineers, and the job they do well.

You can probably name the ones I’m going to rattle off here, the µA741 op-amp designed by David Fullagar for Fairchild in 1968, the NE555 timer from Hans Camenzind for Signetics in 1971, and a personal favourite, Bob Widlar’s µA723 linear regulator for Fairchild in 1967. There may be a few others that readers will name in the comments, but there’s one that until today it’s likely that few of you would have considered. Texas Instruments’ 5400 and 7400 TTL quad 2-input NAND gate has been in continuous production since 1964 and is the progenitor of what is probably the most numerous breed of integrated circuits, yet it doesn’t trip off the tongue when listing famous chips, and none of us can name its designer. So today we’re turning the spotlight on this neglected piece of silicon, and trying to bring it the adulation it deserves. Continue reading “The 7400 Quad 2-Input NAND Gate, A Neglected Survivor From A Pre-Microprocessor World” →

Behold The WT-220: A ‘Clever’ VT-220 Terminal

December 20, 2018 by Donald Papp 27 Comments

[John Whittington] failed to win a bid for an old VT-220 serial terminal on eBay, so he decided to make his own version and improve it along the way. The result is the Whitterm-220 (or WT-220) which has at its core a Raspberry Pi and is therefore capable of more than just acting as a ‘dumb’ serial terminal.

Rear of the WT-220 with paint-filled laser engraving and all necessary connectors.

The enclosure is made from stacked panels of laser-cut plywood with an acrylic plate on the back for labels and connectors, where [John] worked paint into the label engravings before peeling off the acrylic’s protective film. By applying paint after laser-engraving but before peeling off the film, it acts as a fill and really makes the text pop.

Near the front, one layer of clear acrylic among the plywood layers acts as a light guide and serves as a power indicator, also doing double duty as TX/RX activity lights. When power is on, that layer glows, serving as an attractive indicator that doesn’t interfere with looking at the screen. When data is sent or received, a simple buffer circuit tied to the serial lines lights up LEDs to show TX or RX activity, with the ability to enable or disable this functionality by toggling a GPIO pin. A video overview is embedded below, where you can see the unit in action.

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