It’s graduation time, and you know what that means! Another great round of senior design projects doing things that are usually pretty unique. [Bruce Land] sent in a great one from Cornell where the students have been working on a project that uses FPGAs and a few video cameras to keep score of a ping-pong game.
The system works by processing a live NTSC feed of a ping pong game. The ball is painted a particular color to aid in detection, and the FPGAs that process the video can keep track of where the net is, how many times the ball bounces, and if the ball has been hit by a player. With all of this information, the system can keep track of the score of the game, which is displayed on a monitor near the table. Now, the players are free to concentrate on their game and don’t have to worry about keeping score!
This is a pretty impressive demonstration of FPGAs and video processing that has applications beyond just ping pong. What would you use it for? It’s always interesting to see what students are working on; core concepts from these experiments tend to make their way into their professional lives later on. Maybe they’ll even take this project to the next level and build an actual real, working ping pong robot to work with their scoring system!
Continue reading “FPGAs Keep Track of your Ping Pong Game”
Early game consoles like the Atari 2600 had a very, very limited amount of RAM. There wasn’t even enough RAM for all the pixels on the screen; instead, pixels were generated by the CPU as they were being drawn. It’s playing with scanlines and colorbusts with code, something we’re now calling. ‘racing the beam’ for some reason.
[Sam] is in the middle of an EE degree right now, and for a digital design class he needed to write some Verilog. At the time he was addicted to the game Super Hexagon, and the game mechanics are simple enough for an FPGA. He built his own implementation, but not one with framebuffers. He’s using a pipelined approach where each pixel’s value is calculated just a few clock cycles before it’s displayed. It vastly reduces the memory requirements, on his Altera DE1 board compared to the framebuffer approach.
Continue reading “Racing The Beam With Super Hexagon”
The Philips Ambilight – a bunch of rear-facing RGB LEDs taped to the back of a TV – is becoming the standard project for anyone beginning to tinker with FPGAs. [DrX]’s is the best one we’ve seen yet, with a single board that reads and HDMI stream, makes blinkey lights go, and outputs the HDMI stream to the TV or monitor.
[DrX] is using an FPGA development board with two HDMI connectors – the Scarab miniSpartan6+ – and a strand of WS2801 individually addressable RGB LEDs for this project. With a bit of level shifting, driving the LEDs was easily taken care of. But what about decoding HDMI?
Most of the project is borrowed from a project that displays a logo in the corner of a 720p video stream. The hardware is the same, but for an Ambilight clone, you need to read the video stream and process it, not just write to it. By carefully keeping track of the R, G, and B values for each pixel along with the pixel clock, the colors along the edge of a display can be averaged. It’s not as difficult or as memory-intensive as building a frame buffer; nearly all of the picture data is thrown out when assembling the averages around the perimeter of the display. It does work, though.
After figuring out the average color around the perimeter of the display, it’s just a simple matter of driving the LEDs. Tape those LEDs to the back of a TV, and there’s an Ambilight clone, made with an FPGA.
[DrX] has a few videos of his project in action. You can check those out below.
Continue reading “FPGA Based Ambilight Clone”
The Vintage Computer Festival last weekend featured racks and racks of old minicomputers, enough terminals for an entire lab, and enough ancient storage devices to save a YouTube video. These storage devices – hard disks, tape readers, and 8″ disk drives – were only connected to vintage hardware, with one exception: a DEC RL02 drive connected to a modern laptop via USB.
The DEC RL02 drive is the closest you’re going to get to a modern mechanical hard drive with these old machines. It’s a huge rack unit with removable platters that can hold 10 Megabytes of storage. [Chris] found one of these old drives and because he wanted to get into FPGA development, decided to create a USB adapter for this huge, old drive.
The hardware isn’t too terribly complex, with a microcontroller and an FPGA that exposes the contents of the drive over USB mass storage. For anyone trying to bootstrap a PDP-11 or -8 system, [Chris] could download disk images from the Internet, write them to the disk, and load up the contents of the drive from the minicomputer. Now, he’s using it with SimH to have a physical drive for an emulated system, but the controller really doesn’t care about what format the disk pack is in. If [Chris] formatted a disk pack with a FAT file system, he would have the world’s largest and heaviest USB thumb drive in the world.
Update: As promised, [Chris] put all the code in a git
Continue reading “VCF East X: The World’s Largest USB Thumb Drive”
Back in the bad old days, if you needed a little bit of custom logic you would whip out a tiny chip known as a PAL. A Programmable Logic Array is just what it sounds like and is the forerunner of modern, unsolderable CPLDs and FPGAs.
PALs and GALs have died off, left to the wastes of the Jameco warehouse, and now it seems the only programmable logic you can buy are huge, 100-pin monstrosities. [Nick] at Arachnid Labs was working on his Tsunami signal generator when a user asked if they could add just one more feature: a programmable divider to count 256 iterations of a clock. This is the perfect application for dumb logic, but if you’re looking for a part that’s not recommended for new designs, you only need to look to old programmable logic.
Enter the Greenpak. [Nick] had a dev kit for these ‘modern PALs’ sitting around and decided to give it a go. They’re small – they max out at 20 pins – but there are a few features that make it a little more interesting than a simple array of AND and OR gates. The Greenpak3 features analog comparators, look-up tables, RC oscillators, counters, and GPIO that will work well enough as circuit glue. They also work at 5V, something you’re just not going to find in more complex programmable logic.
These tiny chips are programmed in a graphical IDE, but the datasheet (PDF) includes full documentation for the bitstream; someone needs to write a Verilog or VHDL compiler for it soon. The one downside with these chips is that they’re tiny; 0.4mm pitch QFN packages. If you can solder that, you’re too good at soldering.
Field Programmable Gate Arrays (FPGAs) let you program any logic you’d like onto a chip. You write your logic using a hardware description language, then flash it to the FPGA. You can even design your own processor and flash it to the chip.
That’s exactly what [jamieiles] has done with the Oldland CPU. It’s an open source 32 bit CPU core that you can synthesize for use on an FPGA. Not only can you browse through all the Verilog code in the Github repo, but there’s also a bunch of tools for working with this CPU core.
Included with the package is oldland-rtlsim, which lets you simulate the processor on a PC. The oldland-debug tool lets you connect to the processor for programming and debugging over JTAG. Finally, there’s a GNU toolchain port that lets you build C code for the device.
Going one step futher, [jamieiles] built a full SoC around the Oldland core. This has SPI, UART, timers, and more features you’d expect to find in a microcontroller. It can be flashed to the relatively cheap Terasic DE0-Nano board.
[jamieiles] has also ported u-boot to the processor, and the next thing on the list is the Linux kernel. If you’ve ever been interested in how CPUs actually work, this is a neat project to look through. If you want more open source CPU cores, check out OpenCores.
The Red Pitaya is a credit-card sized board that runs Linux, has Ethernet, and a good bit of RAM. This sounds a lot like a Raspberry Pi and BeagleBone Black, but the similarities end there. The Red Pitaya also has two RF inputs, two RF outputs, and a load of digital IOs, all connected to an Xilinx SoC that includes an FPGA. [Pavel] realized the Pitaya had all the components of a software-defined radio, and built an implementation to prove it.
The input for the SDR taps directly into one of the high impedance inputs with a simple loop antenna made out of telephone cable. The actual software-defined part of this radio borrows heavily from an Xilinx application note, while everything is controlled by either SDR# or HDSDR.
[Pavel] included a pre-built SD card image with all his software, so cloning this project is simply a matter of copying an SD card and building an antenna. The full source is also available, interesting if you would like to muck about with FPGAs and SDRs.