Hackaday Links: September 25, 2016

So you like watching stupid stuff? Here you go, a scene from Bones that tops the infamous ‘IP backtrace with Visual Basic’ or ‘four-handed keyboard’ scenes from other TV shows. Someone hacked the bones by embedding malware in a calcium fractal pattern. Also, when she uses the fire extinguisher, she doesn’t spray the base of the fire.

Raspberry Pi! You have no idea how good the term Raspberry Pi is for SEO. Even better is Raspberry Pi clusters, preferably made with Raspberry Pi Zeros. Here’s a Raspberry Pi hat for four Raspberry Pi Zeros, turning five Raspberry Pis into a complete cluster computer. To be honest and fair, if you’re looking to experiment with clusters, this probably isn’t a bad idea. The ‘cluster backplane’ is just a $2 USB hub chip, and a few MOSFETs for turning the individual Pis on and off. The Zeros are five bucks a pop, making the entire cluster cost less than two of the big-boy sized Pi 3s.

Do you think you might have too much faith in humanity? Don’t worry, this video has you covered.

Hacking on some Lattice chips? Here’s a trip to CES for you. Lattice is holding a ‘hackathon’ for anyone who is building something with their chips. The top prize is $5k, and a trip to next year’s CES in Vegas, while the top three projects just get the trip to Vegas. If you already have a project on your bench with a Lattice chip, it sounds like a great way to wait an hour for a cab at McCarran.

UPSat. What’s an upsat? Not much, how about you? The first completely open source hardware and software satellite will soon be delivered to the ISS. Built by engineers from the University of Patras and the Libre Space Foundation, the UPSat was recently delivered to Orbital ATK where it will be delivered to the ISS by a Cygnus spacecraft. From there, it will be thrown out the airlock via the NanoRacks deployment pod.

The Voyager Golden Record is a message in a bottle thrown into the cosmic ocean and a time capsule from Earth that may never be opened. Now it’s a Kickstarter. Yes, this record is effectively Now That’s What I Call Humanity volume 1, but there are some interesting technical considerations to the Voyager Golden Record. To the best of my knowledge, no one has ever tried to extract the audio and pictures from this phonographic time capsule. The pictures included in the Golden Record are especially weird, with the ‘how to decode this’ message showing something like NTSC, without a color burst, displayed on a monitor that is effectively rotated 90 degrees counterclockwise from a normal CRT TV. Want to know how to get on Hackaday? Get this Golden Record and show an image on an oscilloscope. I’d love to see it, if only because it hasn’t been done before by someone independent from the original project.

The Perfect Storm: Open ARM + FPGA Board

Playing around with FPGAs used to be a daunting prospect. You had to fork out a hundred bucks or so for a development kit, sign the Devil’s bargain to get your hands on a toolchain, and only then can you start learning. In the last few years, a number of forces have converged to bring the FPGA experience within the reach of even the cheapest and most principled open-source hacker.

[Ken Boak] and [Alan Wood] put together a no-nonsense FPGA board with the goal of getting the price under $30. They basically took a Lattice iCE40HX4K, an STMF103 ARM Cortex-M3 microcontroller, some SRAM, and put it all together on a single board.

The Lattice part is a natural choice because the IceStorm project created a full open-source toolchain for it. (Watch [Clifford Wolf]’s presentation). The ARM chip is there to load the bitstream into the FPGA on boot up, and also brings USB connectivity, ADC pins, and other peripherals into the mix. There’s enough RAM on board to get a lot done, and between the ARM and FPGA, there’s more GPIO pins than we can count.

Modeling an open processor core? Sure. High-speed digital signal capture? Why not. It even connects to a Raspberry Pi, so you could use the whole affair as a high-speed peripheral. With so much flexibility, there’s very little that you couldn’t do with this thing. The trick is going to be taming the beast. And that’s where you come in.

Does the World Need an FPGA Arduino?

What would you get it you mashed up an FPGA and an Arduino? An FPGA development board with far too few output pins? Or a board in the form-factor of Arduino that’s impossible to program?

Fortunately, the ICEZUM Alhambra looks like it’s avoided these pitfalls, at least for the most part. It’s based on the Lattice iCE40 FPGA, which we’ve covered previously a number of times because of its cheap development boards and open-source development flow. Indeed, we were wondering what the BQ folks were up to when they were working on an easy-to-use GUI for the FPGA family. Now we know — it’s the support software for an FPGA “Arduino”.


The Alhambra board itself looks to be Arduino-compatible, with the horrible gap between the rows on the left-hand-side and all, so it will work with your existing shields. But they’ve also doubled them with pinheaders in a more hacker-friendly layout: SVG — signal, voltage, ground. This is great for attaching small, powered sensors using a three-wire cable like the one that you use for servos. (Hackaday.io has two Arduino clones using SVG pinouts: in SMT and DIP formats.)

The iCE40 FPGA has 144 pins, so you’re probably asking yourself where they all end up, and frankly, so are we. There are eight user LEDs on the board, plus the 28 I/O pins that end in pinheaders. That leaves around a hundred potential I/Os unaccounted-for. One of the main attractions of FPGAs in our book is the tremendous availability of fast I/Os. Still, it’s more I/O than you get on a plain-vanilla Arduino, so we’re not complaining too loudly. Sometimes simplicity is a virtue. Everything’s up on GitHub, but not yet ported to KiCad, so you can tweak the hardware if you’ve got a copy of Altium.

We’ve been seeing FPGA projects popping up all over, and with the open-source toolchains making them more accessible, we wonder if they will get mainstreamed; the lure of reconfigurable hardware is just so strong. Putting an FPGA into an Arduino-compatible form-factor and backing it with an open GUI is an interesting idea. This project is clearly in its very early stages, but we can’t wait to see how it shakes out. If anyone gets their hands on these boards, let us know, OK?

Thanks [RS] for the tip!

Icestudio: An Open Source Graphical FPGA Tool

If you’ve ever worked with FPGAs, you’ve dealt with the massive IDEs provided by the vendors. Xilinx’s ISE takes about 6 gigabytes, and Altera’s Quartus clocks in at over 10 gigs. That’s a lot of downloading proprietary software just to make an LED blink.

[Jesús Arroyo]’s Icestudio is a new, graphical tool that lets you generate Verilog code from block diagrams and run it on the Lattice Semi iCEstick development board. A drag and drop interface lets you connect IOs, logic gates, dividers, and other elements. Once your block diagram is ready, a single button press downloads the code to the iCEstick.

Under the hood, Icestudio uses IceStorm, which we’ve discussed on HaD in the past, including this great talk by [Clifford], Icestorm’s lead. For the GUI, Icestudio uses nw.js, which spits out JSON based on the block diagram. This JSON is converted into a Verilog file and a PCF file. The Verilog is used to create the logic on the FPGA, and the PCF is used to define the pin configuration for the device. Clicking on selected modules reveals the generated Verilog if you want to know what’s actually going on.

It’s experimental, but this looks like a neat way to get started on FPGAs without learning a new language or downloading many gigs of toolchains. We’re hoping Icestudio continues to grow into a useful tool for education and FPGA development. A demo follows after the break.

[Thanks to Nils for the tip!]

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Taking the Pulse (Width Modulation) of an FPGA

I like to think that there are four different ways people use FPGAs:

  1. Use the FPGA as a CPU which allows you to add predefined I/O blocks
  2. Build custom peripherals for an external CPU from predefined I/O blocks
  3. Build custom logic circuitry from scratch
  4. Projects that don’t need an FPGA, but help you learn

I’d bet the majority of FPGA use falls into categories one and two. Some FPGAs even have CPUs already built-in. Even without an onboard CPU, you can usually put a CPU “core” (think reusable library) into the chip. Either way, you can always add other cores to create UARTs, USB, Ethernet, PWM, or whatever other I/O you happen to need. You either connect them to a CPU on the chip, or an external one. With today’s tools, you often pick what you want from a list and then your entire project becomes a software development effort.

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FPGAs For The Raspberry Pi

FPGA development has advanced dramatically in the last year, and this is entirely due to an open-source toolchain for Lattice’s iCE40 FPGA. Last spring, the bitstream for this FPGA was reverse engineered and a toolchain made available for anything that can run Linux, including a Raspberry Pi. [Dave] from Xess thought it was high time for a Raspberry Pi FPGA board. With the help of this open-source toolchain, he can program this FPGA board right on the Raspberry Pi.

The inspiration for [Dave]’s board came from the XuLA and StickIt! boards that give the Raspberry Pi an FPGA hat. These boards had a problem; the Xilinx bitstreams had to be compiled on a ‘real’ PC and brought over to the Raspberry Pi world. The new project – the CAT Board – brings an entire FPGA dev kit over to the Raspberry Pi.

The hardware for the CAT Board is a Lattice iCE-HX8K, 32 MBytes of SDRAM, a serial configuration flash, LEDs, buttons, DIP switches, grove connectors, and SATA connectors (although [Dave] is just using these for differential signals; he doesn’t know if he can get SATA hard drives to work with this board).

Despite some problems with his board house, [Dave] eventually got his FPGA working, or at least the bitstream configuration part, and he can blink a pair of LEDs with a Raspberry Pi and programmable logic. The Hello World for this project is done, and now the only limit is how many gates are on this FPGA.

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