It is a classic problem when designing with op amps: you need the output to go to zero, but — for most op amps — you can’t quite get down to the supply rail. If your power options are a positive voltage and ground, you can’t get down to zero without a special kind of op amp which might not meet your needs. The best thing to do is provide a negative supply to the chip. Don’t have one? [Peter Demchenko] can help. He uses a simple two-transistor multivibrator along with some diodes and capacitors to generate a minimal negative voltage for this purpose.
The circuit is simple and only produces a small negative voltage. He mentions that into a 910 ohm load, he sees about -0.3V. Not much, but enough to get that op amp down to zero with a reasonable load. Unlike other circuits he’s used in the past, this one is efficient. With a 5-volt input, it draws less than 1.5 mA.



Thankfully, in modern-day Western climates and with modern tech, you are not likely to encounter ESD-caused problems, but they were way more prominent back in the day. For instance, older hackers will have stories of how FETs were more sensitive, and touching the gate pin mindlessly could kill the FET you’re working with. Now, we’ve fixed this problem, in large part because we have added ESD-protective diodes inside the active components most affected.



