FPGA Brings UNIX V1 To The DEC J-11

If you’ve never used a PDP-11 before it’s probably because you simply weren’t around in the 70s and 80s. Although they started as expensive machines only in research labs and industry, they eventually became much more accessible. They’re a bit of a landmark in computing history, too, being largely responsible for the development of things like UNIX and the C programming language. [ryomuk] is using an FPGA in combination with an original DEC J-11 to bring us a new take on this machine. (Google Translate from Japanese)

The FPGA used in this build is a Tang Nano 20k, notable for its relatively low cost. The FPGA emulates the memory system and UART of a PDP-11 system down to the instruction set, while the original, unmodified DEC chip is left to its own devices. After some initial testing [ryomuk] built a PC11 paper tape emulator to ensure the system was working which runs a version of BASIC from the era. The next thing up was to emulate some disk drives and co-processors so that the machine can run the first version of UNIX. 

[ryomuk] also developed a PCB for the DEC microprocessor and the FPGA to sit on together, and it includes all of the jumpers and wiring needed to allow the computer to run UNIX, as well as handling other miscellaneous tasks like power. It’s an interesting build that gets to the heart of the early days of computer science. PDP-11 computers did eventually get smaller and more accessible, and if you want to build a modern version this build fits a complete system into an ATX case.

Thanks to [RetepV] for the tip!

Commodore 64 On New FPGA

When it comes to getting retro hardware running again, there are many approaches. On one hand, the easiest path could be to emulate the hardware on something modern, using nothing but software to bring it back to life. On the other, many prefer to restore the original hardware itself and make sure everything is exactly as it was when it was new. A middle way exists, though, thanks to the widespread adoption of FPGAs which allow for programmable hardware emulation and [Jo] has come up with a new implementation of the Commodore 64 by taking this path.

The project is called the VIC64-T9K and is meant as a proof-of-concept that can run the Commodore 64’s VIC-II video chip alongside a 6502 CPU on the inexpensive Tang Nano 9k FPGA. Taking inspiration from the C64_MiSTer project, another FPGA implementation of the C64 based on the DE10-Nano FPGA, it doesn’t implement everything an original Commodore system would have had, but it does provide most of the core hardware needed to run a system. The project supports HDMI video with a custom kernel, and [Jo] has used it to get a few demos running including sprite animations.

Built with a mix of Verilog and VHDL, it was designed as a learning tool for [Jo] to experiment with the retro hardware, and also brings a more affordable FPGA board to the table for Commodore enthusiasts. If you’re in the market for something with more of the original look and feel of the Commodore 64, though, this project uses the original case and keyboard while still using an FPGA recreation for the core of the computer.

Circuit diagram of linear-feedback shift register.

Can We Replace A Program Counter With A Linear-Feedback Shift Register? Yes We Can!

Today we heard from [Richard James Howe] about his new CPU. This new 16-bit CPU is implemented in VHDL for an FPGA.

The really cool thing about this CPU is that it eschews the typical program counter (PC) and replaces it with a linear-feedback shift register (LFSR). Apparently an LFSR can be implemented in hardware with fewer transistors than are required by an adder.

Usually the program counter in your CPU increments by one, each time indicating the location of the next instruction to fetch and execute. When you replace your program counter with an LFSR it still does the same thing, indicating the next instruction to fetch and execute, but now those instructions are scattered pseudo-randomly throughout your address space!

Continue reading “Can We Replace A Program Counter With A Linear-Feedback Shift Register? Yes We Can!”

Two hands soldering components on a purpble PCB

Vintage Intel 8080 Runs On A Modern FPGA

If you’re into retro CPUs and don’t shy away from wiring old-school voltages, [Mark]’s latest Intel 8080 build will surely spark your enthusiasm. [Mark] has built a full system board for the venerable 8080A-1, pushing it to run at a slick 3.125 MHz. Remarkable is that he’s done so using a modern Microchip FPGA, without vendor lock-in or proprietary flashing tools. Every step is open source.

Getting this vintage setup to work required more than logical tinkering. Mark’s board supplies the ±5 V and +12 V rails the 8080 demands, plus clock and memory interfacing via the M2GL005-TQG144I FPGA. The design is lean: two-layer PCB, basic level-shifters, and a CM32 micro as USB-to-UART fallback. Not everything went smoothly: incorrect footprints, misrouted gate drivers, thermal runaway in the clock section; but he managed to tackle it.

What sets this project apart is the resurrection of a nearly 50-year-old CPU. It’s also, how thoroughly thought-out the modern bridge is—from bitstream loading via OpenOCD to clever debugging of crystal oscillator drift using a scope. [Mark]’s love of the architecture and attention to low-level detail makes this more than a show-off build.
Continue reading “Vintage Intel 8080 Runs On A Modern FPGA”

Various hardware components laid out on a workbench.

Working On Open-Source High-Speed Ethernet Switch

Our hacker [Andrew Zonenberg] reports in on his open-source high-speed Ethernet switch. He hasn’t finished yet, but progress has been made.

If you were wondering what might be involved in a high-speed Ethernet switch implementation look no further. He’s been working on this project, on and off, since 2012. His design now includes a dizzying array of parts. [Andrew] managed to snag some XCKU5P FPGAs for cheap, paying two cents in the dollar, and having access to this fairly high-powered hardware affected the project’s direction.

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MiSTER Multisystem 2 on a wooden table

MiSTer For Mortals: Meet The Multisystem 2

If you’ve ever squinted at a DE10-Nano wondering where the fun part begins, you’re not alone. This review of the Mr. MultiSystem 2 by [Lee] lifts the veil on a surprisingly noob-friendly FPGA console that finally gets the MiSTer experience out of the tinker cave and into the living room. Developed by Heber, the same UK wizards behind the original MultiSystem, this follow-up console dares to blend flexibility with simplicity. No stack required.

It comes in two varieties, to be precise: with, or without analog ports. The analog edition features a 10-layer PCB with both HDMI and native RGB out, Meanwell PSU support, internal USB headers, and even space for an OLED or NFC reader. The latter can be used to “load” physical cards cartridge-style, which is just ridiculously charming. Even the 3D-printed enclosure is open-source and customisable – drill it, print it, or just colour it neon green. And for once, you don’t need to be a soldering wizard to use the thing. The FPGA is integrated in the mainboard. No RAM modules, no USB hub spaghetti. Just add some ROMs (legally, of course), and you’re off.

Despite its plug-and-play aspirations, there are some quirks – for example, the usual display inconsistencies and that eternal jungle of controller mappings. But hey, if that’s the price for versatility, it’s one you’d gladly pay. And if you ever get stuck, the MiSTer crowd will eat your question and spit out 12 solutions. It remains 100% compatible with the MiSTer software, but allows some additional future features, should developers wish to support them.

Want to learn more? This could be your entrance to the MiSTer scene without having to first earn a master’s in embedded systems. Will this become an alternative to the Taki Udon announced Playstation inspired all-in-one FPGA console? Check the video here and let us know in the comments. Continue reading “MiSTer For Mortals: Meet The Multisystem 2”

Fancy Adding A Transputer Or Two To Your Atari ST?

Has anybody heard of the ATW800 transputer workstation? The one that used a modified Atari ST motherboard as a glorified I/O controller for a T-series transputer?  No, we hadn’t either, but transputer superfan [Axel Muhr] has created the ATW800/2, an Atari Transputer card, the way it was meant to be.

The transputer was a neat idea when it was conceived in the 1980s. It was designed specifically for parallel and scientific computing and featured an innovative architecture and dedicated high-speed serial chip-to-chip networking. However, the development of more modern buses and general-purpose CPUs quickly made it a footnote in history. During the same period, a neat transputer-based parallel processing computer was created, which leveraged the Atari ST purely for its I/O. This was the curious ATW800 transputer workstation. That flopped as well, but [Axel] was enough of a fan to take that concept and run with it. This time, rather than using the Atari as a dumb I/O controller, the card is explicitly designed for the Mega-ST expansion bus. A second variant of the ATW800/2 is designed for the Atari VME bus used by the STe and TT models—yes, VME on an Atari—it was a thing.

Continue reading “Fancy Adding A Transputer Or Two To Your Atari ST?”