lattice

35 Articles

Icoboard Software Defined Radio Platform

March 20, 2018 by 8 Comments

The Icoboard is a plug-in for the Raspberry Pi with a Lattice iCE FPGA onboard. Combined with a cheap A/D converter, [OpenTechLab] build a software-defined radio using all open source tools. He found some inexpensive converters that cost about $25 and were fast enough (32 MHz) for the purpose at hand. The boards also had a digital to analog converter and he was able to find the data sheets. You can see a video with the whole project covered, below.

The video, by the way, is pretty extensive (about an hour’s worth) and covers the creation of a PC board to connect from the Icoboard to the converters. There’s also a 3D printed frame, and that’s explained in detail as well.

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Caped Beagle Is FPGA Superhero

March 3, 2018 by 14 Comments

We miss the days when everything had daughterboards. Now, Arduinos have shields and Raspberry Pis have hats. The BeagleBone has capes. Whatever. However, regardless of the name, the open source BeagleWire cape/shield/hat/daughterboard connects to a BeagleBone and provides a Lattice iCE40HX FPGA, some support hardware, and common I/O connectors like Pmod and Grove. You can see a video about the board below.

In addition to the FPGA, the board contains a EEPROM, RAM, flash memory, an oscillator, and a few buttons, switches and LEDs. The buttons even feature hardware debouncing. The parts list and design files are all available and — depending on a successful crowdfunding campaign — you might be able to buy one for $75 in the future.

The board is configured to communicate over the 100 MHz 16-bit GPMC port. Linux software and example drivers are available so it should be fairly simple to get the FPGA and CPU talking to each other for your own purposes.

If you decide to build your own, there’s a one-click button that will populate a DigiKey cart for you with most of the components. Although the DigiKey site complained about an error, it did seem to order 24 of the 26 components and the total came to just over $50. Of course, you’d still need to source the missing parts and the board.

We’ve talked about the Lattice iCE FPGAs quite a bit in the past. Not only do you have our tutorial videos, but there are plenty of others, too.

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FPGA Design From Top To Bottom

October 24, 2017 by 20 Comments

[Roland Lutz] gave a talk about FPGA design using the free tools for Lattice devices at the MetaRheinMainChaosDays conference this year. You can see the video below. It’s a great introduction to FPGAs that covers both the lowest-level detail and some higher level insight. If you’re getting started with these FPGAs, this video is a must-see.

[Roland] starts with the obligatory introductory material. He then jumps into an actual example before zooming back out to look at the internal details of the Lattice FPGA. For instance, this FPGA supports multiple bitstreams, so you can switch between different “programs” on the fly.

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Learn FPGA Programming From The 1940s

October 5, 2017 by 11 Comments

We often think that not enough people are building things with FPGAs. We also love the retrotechtacular posts on old computer hardware. So it was hard to pass up [karlwoodward’s] post about the Chip Hack EDSAC Challenge — part of the 2017 Wuthering Bytes festival.

You might recognize EDSAC as what was arguably the first operational computer if you define a computer as what we think of today as a computer. [Maurice Wilkes] and his team invented a lot of things we take for granted today including subroutines (Wheeler jumps named after a graduate student).

The point to the EDSAC challenge was to expose people to creating designs with FPGAs, particularly using the Verilog hardware description language (HDL). If you want to follow along or run your own Chip Hack, the materials are available on the Web. You can see an FPGA driving a tape punch to create souvenir tapes in the video, below.

Some of the exercises are pretty simple and that’s perfect if you are starting out. The challenge uses a board with a Lattice ice40 FPGA and the open source toolchain for Lattice we’ve covered before. In fact, we’ve even done our own tutorials on the same basic device (but not the same board). Our final project generated PWM, not paper tape.

For the record, EDSAC was awesome. The execution unit was serial and processed bits that marched in one at a time over a mercury delay line. There is quite a bit of documentation and even some simulators, so if you ever wanted to get your hands into an old computer, this one isn’t a bad one to try.

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Hackaday Links: September 17, 2017

September 17, 2017 by 51 Comments

BREAKING NEWS: APPLE HAS RELEASED A NEW RECTANGLE. IT IS BETTER THAN THE PREVIOUS RECTANGLE, WHICH WAS A LESSER RECTANGLE. SOME PEOPLE ARE UNHAPPY WITH THE NEW RECTANGLE BECAUSE OF [[CHANGES]]. THE NEW RECTANGLE HAS ANIMATED POO.

Mergers and acquisitions? Not this time. Lattice Semiconductor would have been bought by Canyon Bridge — a private equity firm backed by the Chinese government — for $1.3B. This deal was shut down by the US government because of national security concerns.

[Jan] is the Internet’s expert in doing synths on single chips, and now he has something pretty cool. It’s a breadboard synth with MIDI and CV input. Basically, what we’re looking at is [Jan]’s CVS-01 chip for a DCO, DCF, and DCA), a KL5 chip for an LFO, and an envelope chip. Tie everything together with a two-octave captouch keyboard, and you have a complete synthesizer on a breadboard.

As an aside relating to the above, does anyone know what the cool kids are using for a CV/Gate keyboard controller these days? Modular synths are making a comeback, but it looks like everyone is running a MIDI keyboard into a MIDI-CV converter. It seems like there should be a –simple, cheap– controller with quarter-inch jacks labeled CV and Gate. Any suggestions?

World leaders are tweeting. The Canadian PM is awesome and likes Dark Castle.

Way back in July, Square, the ‘POS terminal on an iPad’ company posted some data on Twitter. Apparently, fidget spinner sales peaked during the last week of May, and were declining through the first few weeks of summer. Is this proof the fidget spinner fad was dead by August? I have an alternate hypothesis: fidget spinner sales are tied to middle schoolers, and sales started dropping at the beginning of summer vacation. We need more data, so if some of you could retweet this, that would be awesome.

Remember [Peter Sripol], the guy building an ultralight in his basement? This is going to be a five- or six-part video build log, and part three came out this week. This video features the installation of the control surfaces, the application of turnbuckles, and hardware that is far too expensive for what it actually is.

TinyFPGA Is A Tiny FPGA Board

July 31, 2017 by 40 Comments

We recently noticed an open source design for TinyFPGA A-Series boards from [Luke Valenty]. The tiny boards measure 18 mm by 30.5 mm and are breadboard friendly. You can choose a board that holds a Lattice Mach XO2-256 or an XO2-1200, if you need the additional capacity.

The boards have the JTAG interface on the side pins and also on a top header that would be handy to plug in a JTAG dongle for programming. The tiny chips are much easier to work with when they are entombed in a breakout board like this. Bigger boards with LEDs and other I/O devices are good for learning, but they aren’t always good for integrating into a larger project. The TinyFPGA boards would easily work in a device you were prototyping or doing a small production run.

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Lattice ICE40 FPGA Configured By Linux Kernel

April 13, 2017 by 15 Comments

The Linux kernel recently added support for loading firmware into an FPGA via the FPGA Manager Framework. [OpenTechLab] has built a driver for the Lattice iCE40 FPGA (same chip used on the iCEStick and other development boards). One attraction to the iCE40 is there is an open source toolchain called iCEStorm.

Even if you aren’t specifically interested in FPGAs, the discussion about Linux device drivers is good background. The principles would apply to other drivers, and would definitely apply if you want to write another FPGA loader.

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