RISC-V

91 Articles

Linux On A Commodore 64

August 27, 2023 by 31 Comments

We are used to seeing Linux running on almost everything, but we were a bit taken aback to see [semu-c64] running Linux on a Commodore 64. But between the checked-out user name and the caveat that: “it runs extremely slowly and it needs a RAM Expansion Unit”, one can already start piecing together what’s happening here.

The machine running Linux is really a RISC-V32. It just so happens that the CPU is virtual, with the C64 pretending it is a bigger machine. The boot-up appears to take hours, so this is in no way practical, even though the comment is that optimization might be able to get a 10X speed up. It would still be about as slow as you can imagine.

To further add a layer of abstraction, the code hasn’t run yet on real Commodore hardware. Instead, it is running on an emulator. The emulator has “warp” mode to run faster than a real machine, and it is still slow. So think about that before you rush out to volunteer to boot this on your real hardware.

Tricks like this fall into the talking dog category. If a dog can talk, it isn’t that you think it will have something important to say. You just marvel that it can do it at all. Still, we get it. We spend a lot of time doing things at least as pointless. But at least it is fun!

Maybe emulate the whole thing in VR? Or maybe write some virtualization code for the C64 so you can emulate a Linux box and a quantum computer simultaneously.

Debian Officially Adds RISC-V Support

July 25, 2023 by 21 Comments

As time goes on, more and more computer manufacturers are moving towards the ARM architecture and away from the bloated and outdated x86 instruction set. Apple is the most prominent producer to take this step, but plenty others are using ARM for its flexibility and efficiency. The only problem with ARM is that it’s licensed, so if you want to go even further down the open-source path the RISC-V instruction set is the next logical step. Now at least one mainline Linux distribution will officially support this architecture.

While Debian did have some support for RISC-V before this as a Debian port, which was not officially part of Debian. However, the official support will begin with the release of Debian 13, which is currently in the testing phase and hasn’t seen a stable release yet. To that end, the current state of this official version is extremely limited, being described as “almost empty” but with planned support for an initial 90 packages in the coming days. Most users working on a RISC-V platform will most likely to continue to use their Debian ports version.

It might be a little while before the RISC-V version is as full-featured as the ARM or x86 versions of this Linux distribution, but we are happy to see it move in this direction at all. And don’t think that RISC-V is limited to embedded systems or otherwise limited computing platforms, either. We’ve seen full Linux desktops with RISC-V processors since at least 2019.

This RISC-V CPU Games In Rust From Inside The Game

July 17, 2023 by 14 Comments

[Xander Naumenko] has created something truly impressive — a working RISC-V CPU completely contained in a Terraria world. And then for added fun, he wrote the game of pong, playable in real time, from within the game of Terraria. It’s all based on the in-game wiring system, combined with a bit of a hack that uses the faulty lamp mechanic to create a very odd AND gate. In Terraria, the existing logic gates have timing issues that make them a no-go for complicated projects like this one. The faulty lamp is intended to do randomized outputs, by stacking multiple inputs to get a weighted output when a clock signal is applied. The hack is to simply give this device a single input, turning it into a clocked IF gate. Two of them together in series makes a clocked AND gate, and two in parallel make a clocked OR gate.

Why would [Xander] embark on this legendary endeavor? Apparently after over eight thousand hours clocked in game, one gets a bored of killing slimes and building NPC houses. And playing with the game’s wiring system turned on a metaphorical lightbulb, that the system could be used to build interesting systems. A prototype CPU, with a completely custom instruction set came next, and was powerful enough to compute Fibonacci. But that obviously wasn’t enough. Come back after the break for the rest of the story and the impressive video demonstration.

Continue reading “This RISC-V CPU Games In Rust From Inside The Game” →

At Last, A Beagle V In The Wild

July 13, 2023 by 41 Comments

The RISC-V ISA specification contains the recipe for everything from the humblest of microcontrollers to the most accomplished of high-end application processors, but it’s fair to say that at our end of the market it’s mostly been something for the lower end. There are plenty of inexpensive small RISC-V microcontrollers, but so far not much powerful enough for example to run a Linux-based operating system.

It’s a situation that’s slowly changing though, and it looks as though things may have taken a turn for the better as a new BeagleBoard has appeared using a RISC-V chip. The BeagleV-Ahead has a BeagleBone form factor and packs an Alibaba T-Head TH1520 SoC, a 2GHz quad-core part with a GPU and DSP components on-board. They link to a selection of distributors, from which one can seemingly be bought for about $170.

It’s a departure from the ARM chips that have until now powered the BeagleBoard line, but its appearance shouldn’t come as a surprise to seasoned Beagle watchers as they announced their RISC-V developments back in 2021. We’re guessing they too had to contend with the chip shortage which hit other players such as Raspberry Pi, so we’re pleased to see a product on the market. In particular though we’re pleased to see one on a BeagleBoard. because unlike a random no-name single board computer they’re a manufacturer who supports their products.

There’s a page with a good choice of operating systems for the board, and we hope that this means they provide kernel support for this SoC. This is the real benefit of buying a BeagleBoard or a Raspberry Pi, because cheap competitors will typically support only one kernel version compared with their years of support. So while this board is by no means cheap, we’re hoping it heralds a new wave of powerful RISC-V computers. Something to look forward to indeed.

A 32-Bit RISC-V CPU Core In 600 Lines Of C

June 24, 2023 by 29 Comments

If you have ever wanted to implement a RISC-V CPU core in about 600 lines of C, you’re in luck! [mnurzia]’s rv project does exactly that, providing a simple two-function API.

Technically, it’s a user-level RV32IMC implementation in ANSI C. There are many different possible flavors of RISC-V, and in this case is a 32-bit base integer instruction set (RV32I), with multiplication and division extension (M), and compressed instruction set extension (C).

There’s a full instruction list and examples of use on the GitHub repository. As for readers wondering what something like RISC-V emulation might be good for, it happens to be the not-so-secret sauce to running Linux on an RP2040.

An Entire RISC-V Operating System In 2000 Lines

May 18, 2023 by 34 Comments

While Microsoft and Apple don’t release the source code for their operating systems, a good estimate is that it takes around 50 million lines of code to run these software behemoths. The Linux kernel alone holds around 30 million lines, with systemd containing over one million lines on its own, which doesn’t include estimates for the desktop environment or other parts of a standard installation. But millions of lines of code, or even hundreds of thousands, aren’t necessary for building a fully functioning operating system. This one sets up a complete OS in exactly 2000 lines of code.

Called egos-2000, short for Earth and Grass Operating System, the diminutive operating system is written for RISC-V computers and while it does contain most of the tools we would recognize in an OS, it was built specifically for computer science students by PhD candidate Yunhao Zhang. The slimmed-down operating system makes it possible for students to easily read and understand every feature of an operating system without it becoming too overwhelming, and can be easily used and modified to experiment with. The name itself comes from its design principles, where parts of the operating system that interact with hardware directly are part of the “Earth” layer and parts that don’t depend on hardware being placed in the “Grass” layer, with applications taking up a third layer.

The OS is available on this GitHub page under an MIT license and works on real RISC-V hardware as well as within various emulators. Building a complete operating system in so few lines of code is an impressive feat, and making it comprehensive enough to teach students with goes well beyond that accomplishment as well. Often when concepts in computer science are reduced to their bare minimum components, we end up with completely illegible (but interesting) experiments like this programming language instead.

Run Linux By Emulating RISC-V On A RISC-V Microcontroller

April 23, 2023 by 7 Comments

For years it was a given that it was impossible to run a Linux based operating system on a less powerful computer whose architecture lacked a memory management unit. There were projects such as uCLinux which sought to provide some tidbits to low computing power Linux users, but ultimately they came to naught. It is achievable after a fashion though, by using the limited architecture to emulate a more powerful one. It’s been done on AVR chips emulating ARM, on ARM chips, and now someone’s done it on an ESP32-C3 microcontroller, a RISC-V part running a RISC-V emulator. What’s going on?

RISC-V is an architecture specification that can be implemented at many levels from a simple microcontroller or even a pile of 74 logic to a full-fat application processor. The ESP32-C3 lies towards the less complicated end of this curve, though that’s not the whole reason for the emulation. The PSRAM storage is used by the C3 as data storage and can’t be used to run software, so to access all that memory capacity an emulator is required that in turn can use the PSRAM as its program memory. It’s a necessary trick for Espressif’s implementation of the architecture.

Surprisingly it’s not as slow as might be expected, with a boot-up time under two minutes. It’s not what we’d expect from our desktop powerhouses, but it’s not so long ago that certain lower-power full-fat processors could be just as lethargic. For past glories, see the AVR running Linux, and the RP2040.