Designing Flip-Flops with Python and Migen

migen

Flip-flops are extremely simple electronic circuits, forming the basis of clock circuits, memory circuits, buffers, and shift registers. Through his dilly-dallying with digital logic, [Jeffery] decided he would build his own. Not with Verilog or VHDL, though, but Migen: the Python-based way to build digital circuits with software.

Migen is an interesting tool that makes traditional FPGA programming a lot easier; instead of Verilog or VHDL, Migen allows an FPGA to be programmed in Python. Yes, it’s the tool you’ve been waiting for, and the tutorials make it look pretty easy. After installing Migen, [Jeff] wrote a class for a D flip-flop in only three lines of code. That’s three readable lines of code, and he was able to simulate the flip-flop with gtkwave in another two lines. Compared to learning the complexities of VHDL or Verilog, Migen makes digital logic and FPGA programming a breeze.

[Jeff] has a great tutorial for building a D flip-flop with Migen, but we’d love to see some more complex examples of what can be done with this very cool tool. If you’re building (or have built) something with Migen, be sure to send it in and relate your experiences.

Autonomous Quadcopter Fits in the Palm of your Hand

_5184952 [Horiken Engineering], which is made up of engineering students at the department of aerospace at the University of Tokyo have developed an autonomous quadcopter that requires no external control — and its tiny. By using two cameras and a sonar sensor, the quadcopter is capable of flying by itself due to its ability to process the data from the on-board sensors. To do the complex data processing fast enough to fly, it is using a Cortex-M4 MCU, a Spartan-6 FPGA, and 64MBs of DDRSDRAM. It also has the normal parts of a quadcopter, plus gyros, a 3D printed frame and a 3-axis compass. The following video demonstrates the quadcopter’s tracking ability above a static image (or a way point). The data you see in real-time is only the flight log, as the quadcopter receives no signal — it can only transmit data.

[Read more...]

A FPGA Controlled Reflow Oven

FPGA Reflow Oven

For Christmas, [Hamster]‘s wife gave him a mini-oven. Later that day, he tore it apart and built this FPGA controlled reflow oven.

We’ve seen plenty of reflow oven builds in the past. Most of those projects use a microcontroller to do closed loop control, sensing the temperature and toggling the heating element to hit a set point. This build uses the Papilo One FPGA development board as a controller. It implements a state machine that meets the reflow profile of the solder paste, ensuring SMD components are soldered properly.

The oven uses a MAX31855 to read temperature from a thermocouple. This device provides amplification, cold junction compensation, and analog to digital conversion which spits out the temperature over SPI. To control the heater, a 40A solid state relay is used.

The VHDL code that drives this oven is linked in the writeup, and has some interesting bits for those looking to experiment with FPGAs. It includes an SPI interface, display driver, and the temperature state machine logic.

FPGAs For The Pi And ‘Bone

logi

We’ve seen FPGA dev boards out the wazoo—even some following the current trend of putting an FPGA and an ARM processor on a single board. Take one good idea and mix it in with a few million Linux/ARM boards already piling up on workbenches the world over and you get LOGi: an FPGA designed to plug into the Raspberry Pi and BeagleBone.

Both the Raspberry Pi and BeagleBone versions of the LOGi feature a Spartan 6 FPGA with 9152 logic cells, 16 DSP Slices, 576KB of RAM, and 96 I/O Pins. There’s also 256 MB of SDRAM and a SATA connector. The Kickstarter has a few demos for this board, namely a machine vision, Bitcoin mining (though don’t expect this board to make return-on-investment with mining), and an autonomous vehicle control demo. The LOGi’s hardware is comparable to the Papilio Pro, so potential projects may include generating NTSC video, adding a VGA out, and a few retrocomputer emulations via OpenCores.

For what this Kickstarter asks for the Pi or ‘Bone version of the LOGi—$89 USD for either—you’ll get a surprisingly capable FPGA dev board that’s a bit cheaper than comparable offerings. Sure, you won’t save any money buying a Pi and a LOGi, but if you have a few Raspberries lying about, you could do much worse for a starter FPGA board.

Thanks [hamster] for sending this one in.

Build an FPGA Microbee in Three (Not so) Easy Steps

Microbee,_Melbourne_Museum

[Brad Robinson] was feeling a bit nostalgic for his Microbee, so he rebuilt it in an FPGA. Not once, but three times. For the uninitiated, the Applied Technology Microbee was a Z80 based computer 1980’s. Designed in Australia, the Microbee did not see much popularity outside its home continent. Even so, the introduction to home computers many Australians was on a Microbee. [Brad] actually wrote several programs for the Microbee, including some games sold by Applied Technology themselves.

Fast forward to 2012, [Brad] is learning FPGAs, and wants to build a Microbee in VHDL. The FPGAbee was born. The first iteration of the FPGAbee began with the CPU, which came from the T80 open source VHDL Z80 core. Around this core [Brad] added the video controller, keyboard, and sound. When he started adding disk functionality, [Brad] ran into some problems. He wanted to use a FAT formatted SD card for cassette and hard disk emulation.

The relative complexities of the FAT format meant he would have to use some custom software to make this work. [Brad] decided to run this software on a second Z80 core. Both cores would need access to memory, and this is where [Brad] learned what he calls “a hard lesson in cross domain clocks” on FPGAs. Multiple clock nets can cause major propagation delay issues. [Brad] was able to work through the problems, but it caused him to step back and re-evaluate the entire design. This was the start of FPGABee2.

[Read more...]

An Open Source GPU

FPGA

Unless you’re bit-banging a CRT interface or using a bunch of resistors to connect a VGA monitor to your project, odds are you’re using proprietary hardware as a graphics engine. The GPU on the Raspberry Pi is locked up under an NDA, and the dream of an open source graphics processor has yet to be realized. [Frank Bruno] at Silicon Spectrum thinks he has the solution to that: a completely open source GPU implemented on an FPGA.

Right now, [Frank] has a very lightweight 2D and 3D engine well-suited for everything from servers to embedded devices. If their Kickstarter meets its goal, they’ll release their project to the world, giving every developer and hardware hacker out there a complete, fully functional, open source GPU.

Given the difficulties [Bunnie] had finding a GPU that doesn’t require an NDA to develop for, we’re thinking this is an awesome project that gets away from the closed-source binary blobs found on the Raspberry Pi and other ARM dev boards.

SDRAM controller for low-end FPGAs

There are very few ‘recent’ FPGAs out there that can be easily soldered. Due to their important number of IOs, they usually come in Ball Grid Array (BGA) packages. The Xilinx Spartan 6 LX9, a TQFP144 FPGA (having pins with a 0.5mm pitch) is one of the few exceptions that can be used to make low end development boards. However, it doesn’t have a lot of logic and memory resources or an on-chip Memory Control Block implemented in the silicon. Therefore, [Michael] designed an SDRAM controller with a small footprint for it.

Writing an SDRAM controller from scratch isn’t for the fainthearted – first of all you really have to know how SDRAM  works (RAS, CAS, precharges, refresh cycles), and because of the high speed and accurate timing required you also have to learn some of the finer points of FPGA off-chip interfacing. In addition, most publicly available open cores are very complex – for example just the RTL core of the sdr_ctrl controller on opencores.org adds up to over 2,700 lines of Verilog. Even if it is not an accurate comparison metric, [Michael]‘s controller is only 500 lines long.