BeagleBone Black and FPGA Driven LED Wall

LED Wall

 

This is 6,144 RGB LEDs being controlled by a BeagleBone Black and a FPGA. This gives the display 12 bit color and a refresh rate of 200 Hz. [Glen]‘s 6 panel LED wall uses the BeagleBone Black to generate the image, and the LogiBone FPGA board for high speed IO.

[Glen] started off with a single 32 x 32 RGB LED panel, and wrote a detailed tutorial on how that build works. The LED panels used for this project have built in drivers, but they cannot do PWM. To control color, the entire panel must be updated at high speed.

The BeagleBone’s IO isn’t fast enough for this, so a Xilinx Spartan 6 LX9 FPGA takes care of the high speed signaling. The image is loaded into the FPGA’s Block RAM by the BeagleBone, and the FPGA takes care of the rest. The LogiBone maps the FPGA’s address space into the CPU’s address space, which allows for high speed transfers.

If you want to drive this many LEDs, you’ll need to look beyond the Arduino. [Glen]‘s work provides a great starting point, and all of the source is available on Github.

[Thanks to Jonathan for the tip]

SDRAM controller for low-end FPGAs

There are very few ‘recent’ FPGAs out there that can be easily soldered. Due to their important number of IOs, they usually come in Ball Grid Array (BGA) packages. The Xilinx Spartan 6 LX9, a TQFP144 FPGA (having pins with a 0.5mm pitch) is one of the few exceptions that can be used to make low end development boards. However, it doesn’t have a lot of logic and memory resources or an on-chip Memory Control Block implemented in the silicon. Therefore, [Michael] designed an SDRAM controller with a small footprint for it.

Writing an SDRAM controller from scratch isn’t for the fainthearted – first of all you really have to know how SDRAM  works (RAS, CAS, precharges, refresh cycles), and because of the high speed and accurate timing required you also have to learn some of the finer points of FPGA off-chip interfacing. In addition, most publicly available open cores are very complex – for example just the RTL core of the sdr_ctrl controller on opencores.org adds up to over 2,700 lines of Verilog. Even if it is not an accurate comparison metric, [Michael]‘s controller is only 500 lines long.

Pushing FPGA config files via serial using ‘cat’

[Andrew] is trying to buckle down and hammer out his PhD project but was surprised by the sorry state of the configuration options for his FPGA/ARM dev board. Using JTAG was painfully slow, so he studied the datasheet to see if there was another way. It turns out the Xilinx FPGA he’s using does have a slave serial mode so he came up with a way to push configuration from the ARM to the FPGA serially.

Four of the connects he needed were already mapped to PortC pins on the AT91SAM9260 ARM System on a Chip. He ended up using the EN_GSM pin on the FPGA, since there is no GSM module on this board; connecting it to the microcontroller with a piece of wire. Now he can SSH into the ARM processor, grabbing information on the FPGA from /dev/fpga0. When it comes time to program, it’s as easy as using the cat command on the binary file and redirecting the output to the same hook.

Recreating the Commodore PET with an FPGA

commodore_pet_fpga_clone

[Thomas’] love affair with Commodore computers spans well over 30 years, and not too long ago he decided to recreate one of his favorite Commodore offerings, the PET. As we have seen with similar undertakings, this sort of project is no easy task, but [Thomas] seems to be making his way along nicely.

Using a Xilinx Spartan-6 FPGA on the Digilent Nexys3 dev board, he has implemented the Pet in Verilog. Like the original, his clone contains 16K of both ROM and RAM, utilizing the same simulated 6502 microprocessor he used on a previous Apple ][+ project. The FPGA version of the computer sports a 640×400 resolution which is twice that of the original, so [Thomas] simply doubled the size of each of the PET’s pixels to fill in the extra space.

[Thomas] has made some great progress so far, including the ability to load games and other programs from cassette images over a serial connection. He says that there are still a few loose ends to tie up, but it all looks good from here!

Continue reading to see a short video of Space Invaders running on he PET recreation.

[Read more...]

Going a long way for Game Boy Advanced video out

Here’s an intense hack that lets [Matt Evans] play Game Boy Advanced on a larger LCD monitor. He didn’t take the easy way out during any step of the process.

He’s using an FPGA to translate the LCD signals from the GBA hardware into a 1280×960 picture that is then pushed to the large monitor. But did he use an FPGA development board? No, instead he picked up an old PCI card at a surplus store because it had a Xilinx Virtex-E FPGA. So the first thing he had to do there was to remove unneeded components and figure out how to make the connections to reprogram that chip.

So next you’d grab a working monitor and hook it up to the FPGA signal, right? Wrong, [Matt] had a slightly borked monitor, getting rid of the LVDS section and wiring up his own connections to push the RGB signals through in parallel.

Yeah, that’s a lot of work. But as you can see in the clip after the break, it works like a charm. If you’re looking for some other gnarly video-out hacks, check out this one that lets you play Game Boy on an oscilloscope.

[Read more...]

FPGA Arduino shield uses Kickstarter as a preorder system

[ Jack Gassett] is working on an FPGA shield for the Arduino. At first the idea of this expansion board seemed a little silly. But [Jack] mentions that the FPGA board can be quite useful for adding higher-order electronic complexity like HDMI capabilities to an Arduino. We’re not totally sold on the idea, but he’s not making the board solely for use with an Arduino either.

The plan is to use a Xilinx Spartan 3A FPGA which comes in a ball-grid array package. And that is the reason [Jack] decided to use Kickstarter for this project. He shared some of his issues with BGA components in a home manufacturing process a while back. To get these working reliably you need to have them professionally assembled, and that requires a sizable upfront investment. But as we read through his proposal it struck us that he’s actually using Kickstarter as a preorder system. You can get a base model with just the FPGA soldered on the board for $55. Not bad considering the chip will cost you at least $20 without assembly. Each level up includes a few more components like SRAM or add-on PCBs.

We get a lot of tips pointing to Kickstarter proposals but this is one of the few that seems right on the mark for supporting open and innovative development. Great work [Jack]!

[Thanks Simon]

Simulating VHDL of an AVR8 soft processor

Okay, now we’re beginning to feel a bit like [Alice]. This tutorial shows you how to simulate VHDL code. This code is intended to run on an FPGA and includes a software-only version of the AVR 8-bit microcontroller core. Essentially, you’ll simulate VHDL code that simulates AVR hardware. Wrap your mind around that!

The code is intended to run on a Papilio Field Programmable Gate Array development board. We saw an early version of this board running the AVR8 core about a year ago. However, you don’t need to have any hardware to follow along and recreate this simulation yourself. It might be a great way to get your feet wet with FPGA programming before making that first hardware buy. Five different screencasts take you through the process of getting the AVR8 code, using an altered Arduino IDE for it, setting up a free version of Xilinx ISE to run the simulation, then setting it free and interpreting the data that the simulator spits out the other end.