DIYing Huge BGA Packages

One day [Andy] was cruising around eBay and spotted something interesting. Forty Virtex-E FPGAs for two quid each. These are the big boys of the FPGA world, with 512 user IO pins, almost 200,000 logic gates, packed into a 676-ball BGA package. These are not chips designed for the hobbyist. These chips are not designed for boards with less than six layers. These chips aren’t even designed for boards with 6/6mil tolerances from the usual suspects in China. By any account, a 676-ball package is not like a big keep out sign for hobbyists. You don’t turn down a £2 class in advanced PCB design, though, leading to one of the most impressive ‘I just bought some crap on eBay’ projects we’ve seen.

halfbuiltThe project [Andy] had in mind for these chips was a generic dev board, which meant breaking out the IO pins and connecting some SRAM, SDRAM, and Flash memory. The first issue with this project is escape routing all the balls. Xilinx published a handy application note that recommends specific design parameters for the traces of copper under the chip. Unfortunately, this was a six-layer board, and the design rules in the application note were for 5/5mil traces. [Andy]’s board house can’t do six-layer boards, and their design rules are for 6/6mil traces. To solve this problem, [Andy] just didn’t route the inner balls, and hoped the 5mil traces would work out.

With 676 tiny little pads on a PCB, the clocks routed, power supply implemented, too many decoupling caps on the back, differential pairs, static RAM, a few LEDs placed just for fun, [Andy] had to solder this thing up. Since the FPGA was oddly one of the less expensive items on the BOM, he soldered that first, just to see if it would work. It did, which meant it was time to place the RAM, Flash, and dozens of decoupling caps. Everything went relatively smoothly – the only problem was the tiny 0402 decoupling caps on the back of the board. This was, by far, the hardest part of the board to solder. [Andy] only managed to get most of the decoupling caps on with a hot air gun. That was good enough to bring the board up, but he’ll have to figure some other way of soldering those caps for the other 30 or so boards.

Continue reading “DIYing Huge BGA Packages”

Rumors of Xilinx Sale Abound

The companies that design and build the chips we all use – Atmel, Texas Instruments, Microchip, NXP, Freescale, Intel, Altera, Avago, Broadcom, and On Semi are all buying each other, merging, and slowly becoming two or three gigantic semiconductor companies. The question on everyone’s mind is, ‘which company will be next?’ The answer might be Xilinx, inventors of the FPGA and designers of some really cool parts.

The Wall Street Journal and Barron’s reported a few regulatory filings from Xilinx last week. This could signal an acquisition or merger of the company When this could happen is anyone’s guess, but rumors are flooding the Internet over who would buy Xilinx.

Until recently, Xilinx’s largest competitor in the FPGA market was Altera. That is, until Intel came by with a check for $16.7 Billion. The revenue, size, and market cap of both Xilinx and Altera aren’t too different, leading the question of who would have the money to buy Xilinx and isn’t Intel. Aren’t rumors fun?

Xilinx’s portfolio include high performance, mid-range and low-cost FPGAs as well as interesting hybrid devices. One such hybrid is Zynq, an FPGA and fast ARM Cortex A9 processor in the same package. All these chips will be made for years to come in one form or another. The only question is if Xilinx will make these chips, or will the company continue on under some new branding.

Zedboard Multiport Ethernet

The Zedboard uses Xilinx’s Zynq, which is a combination ARM CPU and FPGA. [Jeff Johnson] recently posted an excellent two-part tutorial covering using a Zedboard with multiple Ethernet ports. The lwIP (light-weight Internet Protocol) stack takes care of the software end.

Vivado is Xilinx’s software for configuring the Zynq (among other chips), and the tutorial shows you how to use it. The Ethernet PHY is an FPGA Mezzanine Card (FMC) with four ports that is commercially available. The project uses VHDL, but there is no VHDL coding involved, just the use of canned components.

The real issue when using an FPGA and a CPU is the interface between the processor and the FPGA circuitry. In this case, the ARM standard AXI bus does this task, and the Ethernet component properly interfaces to that bus. The IP application in the second part of the post is an echo server.

We’ve seen the Zynq used in flying machines and also in a music synthesizer. Although this project doesn’t use any Verilog or VHDL that you create, it is still a great example of configuring using Vivado and using common components in a design.

Antti Lukats: The Past, Present, And Future of Programmable Logic

[Antti] has gained a bit of a reputation over on Hackaday.io – he has a tremendous number of FPGA projects on hackaday.io, and they’re all open source. If you’re looking for street cred with FPGAs, [Antti] has it. His Hands-on experience with FPGAs and CPLDs stretches back to the very first chips in the 70s. We’re so happy that he’s working to share this depth of knowledge, and that includes this talk he gave a few weeks ago at the Hackaday SuperConference. Take a look and then join us after the break for an overview of the FPGA terrain, then and now.

Continue reading “Antti Lukats: The Past, Present, And Future of Programmable Logic”

Not Ready for FPGAs? Try a CPLD

[Kodera2t]  wanted to experiment with programmable logic. Instead of going with an FPGA board, he decided to build his own CPLD (complex programmable logic device) board, with a built-in programmer. The CPLD is a Xilinx 9536 which is inexpensive and, though obsolete, still readily available. The programmer for the board uses an FT232RL and the total cost is very low ([kodera2t] says it is in the price range of a Raspberry Pi Zero or about $4).

From a user’s point of view, a CPLD is just a small FPGA. Internally, there is a significant difference in how they implement your design. Although there are differences between different product families, CPLDs usually use a sea of logic gates arranged as an AND/OR chain. By feeding inputs and inverted inputs into the AND gates and then ORing the results, you can build interesting logic circuits. However, modern CPLDs use Verilog or VHDL, so you describe what you want just like with an FPGA and the software figures out how to use the underlying circuits to give you what you want.

Continue reading “Not Ready for FPGAs? Try a CPLD”

Xilinx FPGAs in C for Free

When you think of developing with FPGAs, you usually think of writing Verilog or VHDL. However, there’s been a relatively recent trend to use C to describe what an FPGA should do and have tools that convert that to an FPGA. However, at least in the case of Xilinx parts, this capability is only available in their newest tool (Vivado), and Vivado doesn’t target the older lower-cost FPGAs that most low-cost development boards use.

[Sleibso] who blogs for Xilinx, has an answer. It turns out you can use the Vivado C compilation tools to generate code for older FPGAs; it just involves a less convenient workflow. Vivado (even the free version) generates unique files that the rest of the tool uses to pick up compiled C code. However, it also generates RTL (Verilog or VHDL) as a by-product, and you can import that into the older ISE tool (which has a perfectly fine free version) and treat it as you would any other RTL files.

There’s an example of using the Vivado tool in the video below. [Sleibso] points out that the video is three years old, and the talk about licensing on the video is out of date. The free tools now including this capability. [Sleibso] talks about using a Spartan 6, but the same split workflow should work with most devices ISE supports.

Continue reading “Xilinx FPGAs in C for Free”

ARMs and FPGAs Make for Interesting Dev Boards

Tiny Linux computers are everywhere, and between BeagleBones, Raspberry and Banana Pis, and a hundred other boards out there, there are enough choices to go around. There is an extremely interesting ARM chip from Xilinx that hasn’t seen much uptake in the field of tiny credit-card sized computers: the Zynq. It’s an ARM Cortex-A9 coupled with an FPGA. It’s great for building peripherals that wouldn’t normally be included on a microcontroller. With Zynq, you just instantiate the custom bits in the FPGA, then interface them with a custom Linux driver. Thanks to CrowdSupply, there’s now a board out there that brings this intriguing chip to a proper development platform. It’s called the Snickerdoodle, and if you’ve ever wanted to see the capabilities of an FPGA tightly coupled to a fast processor, this is the board to watch.

The core of the Snickerdoodle is a Xilinx Zynq that features either a 667 MHz ARM Cortex A9 and a 430k gate FPGA (in the low-end configuration) or an 866 A9 and 1.3M gate FPGA. This gives the Snickerdoodle up to 179 I/O ports – far more than any other tiny Linux board out there.

Fully loaded, the Snickerdoodle comes with 2.4 and 5GHz WiFi, Bluetooth, 1GB of RAM, and an ARM Cortex A9 that should far surpass the BeagleBone and Raspberry Pi 2 in capabilities. This comes at a price, though: the top-shelf Snickerdoodle has a base price of about $150.

Still, the power of a fast ARM and a big FPGA is a big draw and we’re expecting a few more of these Zynq boards in the future. There are even a few projects using the Zynq on hackaday.io, including one that puts the Zynq in a Raspberry Pi-compatible footprint. That’s exceedingly cool, and we can’t wait to see what people will build with a small, fast ARM board coupled to an FPGA.