ARMs and FPGAs Make for Interesting Dev Boards

Tiny Linux computers are everywhere, and between BeagleBones, Raspberry and Banana Pis, and a hundred other boards out there, there are enough choices to go around. There is an extremely interesting ARM chip from Xilinx that hasn’t seen much uptake in the field of tiny credit-card sized computers: the Zynq. It’s an ARM Cortex-A9 coupled with an FPGA. It’s great for building peripherals that wouldn’t normally be included on a microcontroller. With Zynq, you just instantiate the custom bits in the FPGA, then interface them with a custom Linux driver. Thanks to CrowdSupply, there’s now a board out there that brings this intriguing chip to a proper development platform. It’s called the Snickerdoodle, and if you’ve ever wanted to see the capabilities of an FPGA tightly coupled to a fast processor, this is the board to watch.

The core of the Snickerdoodle is a Xilinx Zynq that features either a 667 MHz ARM Cortex A9 and a 430k gate FPGA (in the low-end configuration) or an 866 A9 and 1.3M gate FPGA. This gives the Snickerdoodle up to 179 I/O ports – far more than any other tiny Linux board out there.

Fully loaded, the Snickerdoodle comes with 2.4 and 5GHz WiFi, Bluetooth, 1GB of RAM, and an ARM Cortex A9 that should far surpass the BeagleBone and Raspberry Pi 2 in capabilities. This comes at a price, though: the top-shelf Snickerdoodle has a base price of about $150.

Still, the power of a fast ARM and a big FPGA is a big draw and we’re expecting a few more of these Zynq boards in the future. There are even a few projects using the Zynq on, including one that puts the Zynq in a Raspberry Pi-compatible footprint. That’s exceedingly cool, and we can’t wait to see what people will build with a small, fast ARM board coupled to an FPGA.

Xilinx Borrows Code For Their Own Devices

Back in 2012, [tmbinc] discovered a neat little undocumented feature in the Xilinx ISE: the ability to use TCP/IP instead of JTAG cables. [tmbinc] was working on an Open Hardware USB analyzer and discovered the nearly undocumented Xilinx Virtual Cable, a single ‘shift’ command that opens up a TCP connection and sends JTAG data out to another computer on the network. It’s extraordinarily useful, [tmbinc] wrote a daemon for this tool, and everything was right with the world.

Yesterday, [tmbinc] discovered the Xilinx Virtual Cable again, this time in one of Xilinx’s Github repos. The code was extraordinarily familiar, and looking closer at a few of the revisions, he saw it was very similar to code he had written three years ago.

The offending revision in the Xilinx repo is nearly identical to [tmbinc]’s Xilinx Virtual Cable Driver daemon. Variable names are the same, the variables are declared in the same order, and apart from whitespace, code conventions are the same. This is not to say someone at Xilinx stole code from [tmbinc], but if this were a computer science lab, there would be an academic disciplinary hearing. What’s worse, Xilinx plastered their copyright notice at the top of the code.

In an issue [tmbinc] raised, he said he was flattered, but clarified that his code was developed entirely from scratch. He believes the Xilinx code was derived from his own code written three years ago. Since [tmbinc]’s code was uploaded without a license, it defaulted to All Rights Reserved. This does not bode well for the Xilinx legal department.

In any event, you really, really have to wonder what Xilinx’s internal documentation looks like if a random person on the Internet can discover a barely-documented protocol, write a daemon, put it on the Internet, and have someone at Xilinx use that code.

Thanks to the anonymous tipster for sending this into the Hackaday tip jar.

Using The Red Pitaya As An SDR

The Red Pitaya is a credit-card sized board that runs Linux, has Ethernet, and a good bit of RAM. This sounds a lot like a Raspberry Pi and BeagleBone Black, but the similarities end there. The Red Pitaya also has two RF inputs, two RF outputs, and a load of digital IOs, all connected to an Xilinx SoC that includes an FPGA. [Pavel] realized the Pitaya had all the components of a software-defined radio, and built an implementation to prove it.

The input for the SDR taps directly into one of the high impedance inputs with a simple loop antenna made out of telephone cable. The actual software-defined part of this radio borrows heavily from an Xilinx application note, while everything is controlled by either SDR# or HDSDR.

[Pavel] included a pre-built SD card image with all his software, so cloning this project is simply a matter of copying an SD card and building an antenna. The full source is also available, interesting if you would like to muck about with FPGAs and SDRs.

Hacklet 28 – Programmable Logic Hacks

FPGAs, CPLDs, PALs, and GALs, Oh My! This week’s Hacklet focuses on some of the best Programmable Logic projects on! Programmable logic devices tend to have a steep learning curve.  Not only is a new hacker learning complex parts, but there are entire new languages to learn – like VHDL or Verilog. Taking the plunge and jumping in to programmable logic is well worth it though. High-speed projects which would be impossible with microcontrollers are suddenly within reach!

fpga-hdmiA great example of this is [Tom McLeod’s] Cheap FPGA-based HDMI Experimenting Board. [Tom’s] goal was to create a board which could output 720p video via HDMI at a reasonable frame rate. He’s using a Xilinx Spartan 6 chip to do it, along with a handful of support components. The images will be stored on an SD card. [Tom] is hoping to do some video with the setup as well, but he has yet to see if the chip will be fast enough to handle video decoding while generating the HDMI data stream. [Tom] has been quiet on this project for a few months – so we’re hoping that either he will see this post and send an update, or that someone will pick up his source files and continue the project!

ardufpgaNext up is our own [technolomaniac] with his Arduino-Compatible FPGA Shield. Starting out with FPGAs can be difficult. [Technolomaniac] has made it a bit easier with this shield. Originally started as a project on .io and now available in The Hackaday Store, the shield features a Xilinx Spartan 6 FPGA. [Technolomaniac] made power and interfacing easy by including regulators and level shifters to keep the sensitive FPGA happy. Not sure where to start? Check out [Mike Szczys’] Spartan-6 FPGA Hello World! [Mike] takes us from installing Xilinx’s free tool chain to getting a “hello world” led blinker running!

lander3Still interested in learning about Programmable Logic, but not sure where to go? Check out [Bruce Land’s] Teaching FPGA parallel computing. Actually, check out everything [Bruce] has done on – the man is a living legend, and a wealth of information on electronics and embedded systems. Being a professor of engineering at New York’s Cornell University doesn’t hurt either! In Teaching FPGA parallel computing, [Bruce] links to Cornell’s ECE 5760 class, which he instructs. The class uses an Altera/Terasic DE2 FPGA board to demonstrate parallel computing using programmable logic devices. Note that [Bruce] teaches this class using Verilog, so all you seasoned VHDL folks still can learn something new!


chamFinally, we have [Michael A. Morris] with Chameleon. Chameleon is an Arduino compatible FPGA board with a Xilinx Spartan 3A FPGA on-board. [Michael] designed Chameleon for two major purposes:  soft-core processors, and intelligent serial communications interface. On the processor side Chameleon really shines. [Michael] has implemented a 6502 core in his design. This means that it would be right at home as the core of a retrocomputing project. [Michael] is still hard at work on Chameleon, he’s recently gotten fig-FORTH 1.0 running! Nice work [Michael]!

Want more programmable logic goodness? Check out our Programmable Logic List!

That about wraps things up for this episode of The Hacklet! As always, see you next week. Same hack time, same hack channel, bringing you the best of!

An FPGA Based 6502 Computer

A diagram of the CHOCHI Board

It’s no secret that people love the 6502 processor. This historic processor powered some of our favorite devices, including the Apple II, the Commodore 64, and the NES. If you want to play with the 6502, but don’t want to bother with obtaining legacy chips, the CHOCHI board is for you.

While many people have built modern homebrew 6502 computers, the CHOCHI will be much easier for those looking to play with the architecture. It’s based on a Xilinx XC3S50 FPGA which comes preconfigured as a 6502 processor.

After powering on the board, you can load a variety of provided binaries onto it. This collection includes a BASIC interpreter and a Forth interpreter. Of course, you’re free to write your own applications in 6502 assembly, or compile C code for the device using the cc65 compiler.

If you get bored with the 6502 core, you can always grab Xilinx’s ISE WebPACK for free and use the board as a generic FPGA development tool. It comes with 128K of SRAM and 31 I/O pins. Not bad for a $30 board.

BeagleBone Black and FPGA Driven LED Wall

LED Wall


This is 6,144 RGB LEDs being controlled by a BeagleBone Black and a FPGA. This gives the display 12 bit color and a refresh rate of 200 Hz. [Glen]’s 6 panel LED wall uses the BeagleBone Black to generate the image, and the LogiBone FPGA board for high speed IO.

[Glen] started off with a single 32 x 32 RGB LED panel, and wrote a detailed tutorial on how that build works. The LED panels used for this project have built in drivers, but they cannot do PWM. To control color, the entire panel must be updated at high speed.

The BeagleBone’s IO isn’t fast enough for this, so a Xilinx Spartan 6 LX9 FPGA takes care of the high speed signaling. The image is loaded into the FPGA’s Block RAM by the BeagleBone, and the FPGA takes care of the rest. The LogiBone maps the FPGA’s address space into the CPU’s address space, which allows for high speed transfers.

If you want to drive this many LEDs, you’ll need to look beyond the Arduino. [Glen]’s work provides a great starting point, and all of the source is available on Github.

[Thanks to Jonathan for the tip]

SDRAM controller for low-end FPGAs

There are very few ‘recent’ FPGAs out there that can be easily soldered. Due to their important number of IOs, they usually come in Ball Grid Array (BGA) packages. The Xilinx Spartan 6 LX9, a TQFP144 FPGA (having pins with a 0.5mm pitch) is one of the few exceptions that can be used to make low end development boards. However, it doesn’t have a lot of logic and memory resources or an on-chip Memory Control Block implemented in the silicon. Therefore, [Michael] designed an SDRAM controller with a small footprint for it.

Writing an SDRAM controller from scratch isn’t for the fainthearted – first of all you really have to know how SDRAM  works (RAS, CAS, precharges, refresh cycles), and because of the high speed and accurate timing required you also have to learn some of the finer points of FPGA off-chip interfacing. In addition, most publicly available open cores are very complex – for example just the RTL core of the sdr_ctrl controller on adds up to over 2,700 lines of Verilog. Even if it is not an accurate comparison metric, [Michael]’s controller is only 500 lines long.