FPGA

373 Articles

Using VHDL To Generate Discrete Logic PCB Designs

November 13, 2021 by 36 Comments

VHDL and Verilog are hardware description languages, used to describe and define logic circuits. They’re typically used to design ASICs and to program FPGAs, essentially using software to define hardware. However, [Tim] has done something altogether quite creative, creating tools to take VHDL and Verilog and spit out PCB designs for discrete logic. 

Yes, you read that correctly. The basic idea is to take VHDL source code, and then make a PCB layout that implements the desired logic using resistor-transistor logic. From there, the PCB design files can be shipped off to a manufacturer for pick-and-place assembly at a fraction of the cost of producing a bespoke ASIC.

The drawbacks are obvious; tons of individual discrete parts are required, the size penalty is hilariously bad, and power usage is almost certainly orders of magnitude higher than doing the same logic on an ASIC or even FPGA. Oh, and everything’s much slower, too.

However, as an academic exercise or simply for fun, it’s an awesome bit of work. The idea that one can define a complicated logic circuit and have a PCB implementing the logic whipped up by automated tools is amazing, and we absolutely want to see more of this type of thing.

We’ve seen similar work done with VHDL synthesis into 74-series logic design. If you’ve been developing your own fancy digital-logic-fu, be sure to drop us a line!

[Thanks to Yann Guidon for the tip!]

The Game Of Life Moves Pretty Fast, If You Don’t Use Stop Motion You Might Miss It

November 11, 2021 by 12 Comments

Munged Ferris Bueller quotes aside, Conway’s Game of Life is the classic cellular automata that we all reach for. The usual approach is to just iterate over every cell in the grid, computing the next state into a new grid buffer. [K155LA3] set out to turn that on its head by implementing Game Of Life in the hardware of an FPGA.

[K155LA3]’s version uses Chisel, a new HDL from the Berkley and RISCV communities. Under the hood, Chisel is Scala with some custom libraries that know how to map Scala concepts onto hardware. In broad strokes, Verilog and VHDL are focused on expressing hardware and then added abstraction on top of that over the year. Chisel and other newer HDL languages focus on expressing high-level general-purpose elements that get mapped onto hardware. FPGAs already map complex circuits and hardware onto LUTs and other slices, so what’s another layer of abstraction?

The FPGA chosen for this project is a Digilent Arty A7 with a VGA Pmod to turn the RGB444 into analog signals to actually display. What’s impressive about [K155LA3]’s implementation is just how fast it is. Even running at 60 frames per second it’s almost as fast as the monitor can handle. Of course, most computers lying around you could simulate a 60 x4 8 grid at 60 fps. Next, instead of connecting the grid logic to the 60 Hz VGA clock, he connects it to the 100 MHz board external oscillator. Now each pixel in each frame displayed contains over a million generations.

Unfortunately, even this small grid of 60×48 takes up 90% of the LUTs on the Artix-7. In the future, we’d love to see an even larger FPGA hardware implementation capable of handling grids that could hold whole computers in them. And naturally, this isn’t the first FPGA version of the Game Of Life here at Hackaday.

Oscilloscope Clocks: Now In Color!

October 28, 2021 by 5 Comments

Ordinarily, when we hear the words “clock” and “oscilloscope” in the same sentence we conjure images of measuring a stable, repeating square wave that acts as the heartbeat of a system. Of course, that’s not the only meaning– there’s a much more fun and less useful one: using an oscilloscope to display the time.

That’s what [Wolfgang Friedrich] set out to do when he cobbled some protoboard, probes, and an FPGA into the Multi Color Oscilloscope Clock. Each digit on the clock is treated like a seven-segment display, made up of three horizontal bars and four vertical bars. The horizontal bars are generated by constant voltage at different levels, and the vertical bars are generated by quickly switching between two voltages. [Wolfgang] decided to use an R-2R resistor ladder DAC to create the appropriate analog signals from the FPGA’s digital outputs. For bonus points, each set of digits (hours, minutes, and seconds) are output concurrently through separate channels, so they can be displayed in different colors on the screen of his four-channel scope (the fourth channel is used for the points between numbers).

Misusing oscilloscopes in the name of fun has become a time-honored tradition– from Tennis for Two back in 1958 (which later became the beloved Pong) to the plethora of analog o-scope clocks we’ve seen, it’s clear that hackers just can’t get enough of the unique vector display style that a scope can provide. We love [Wolfgang]’s idea of using the scope’s channels to create a multi-color display, and we’re left wondering what kind of wacky waveforms we’ll be seeing next.

Capacitive Touch Controller For FPGAs

October 24, 2021 by 10 Comments

Most projects that interface with the real world need some sort of input device. Obviously this article is being written from a standardized “human interface device” but when the computers become smaller the problem can get more complicated. We can’t hook up a USB keyboard to every microcontroller since we often only need a few buttons, but even buttons can be a little bit too cumbersome for some applications. For something even simpler, we would like to turn your attention to capacitive touch controllers.

Granted, these devices are really only simpler from a hardware perspective. Rather than a switch that can be prone to failure either when its moving parts break or its contacts become corroded, a capacitive touch button only needs a certain conductive area on something like a PCB, along with a few passive components, to work. The real difficulty is in the software, so this project aims to make it simpler to bring these sort of devices to any FPGA that needs some sort of interface like this. It can operate in stand-alone mode or in a custom user interface, and was written to be platform-independent in VHDL without the need for any dependencies or macros.

The project’s page goes into a great amount of detail on how capacitive touch sensors like these work in general, and describes the operation of this specific code as well. Everything is open source, so it’s ready to be put to work right away. If you need capacitive touch capabilities on something like a microcontroller, though, take a look at this tiny Atmel-powered musical instrument instead.

RISC-V In… Typescript?

October 14, 2021 by 8 Comments

We are accustomed to seeing RISC-V implementations in Verilog or VHDL, but [Low Level JavaScript] has one in TypeScript. Before you dismiss it as a mere emulator, know that the project relies on gateware-ts, a conversion between TypeScript and Verilog. From there, you can actually put the CPU on an FPGA. You can see the launch video below and there is one development video as well as, presumably, more to come.

We aren’t sure if many FPGA designers will be willing to switch to TypeScript. But if you are comfortable with it, it might open up FPGA development without having to learn as much of a new language.

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FPGA Retrocomputer: Return To Moncky

September 26, 2021 by 5 Comments

Part of the reason that retrocomputers are still so popular despite their obsolescence is that it’s possible to understand the entire inner workings of a computer like this, from the transistors all the way up to the software. Comparatively, it will likely be a long time (if ever) before anyone is building a modern computer from discrete components. To illustrate this point, plenty of 8-bit computers are available to either restore from original 80s hardware or to build from kits. And if you’d like to get even deeper into the weeds you can design your own computer including the instruction set completely from the ground up using an FPGA.

This project, called the Moncky project, is a step above the usual 8-bit computer builds as it is actually a 16-bit computer. It is built around an Arty Spartan-7 FPGA dev board running around 20 MHz and has access to 2 x 128 kB dual-port RAM for memory. To access the outside world there is a VGA output, PS/2 capability, SPI, and uses an SD card as a hard drive. This project really shines in the software, though, as the project creator [Kris Demuynck] builds everything from scratch in order to illustrate how everything works for educational purposes, and is currently working on implementing a C compiler to make programming the computer easier.

All of the project files, as well as all of the code, are available on the project’s GitHub page if you’d like to follow along or build on this homebrew 16-bit computer. It’s actually the third iteration of this computer, with the Moncky-1 and Moncky-2 being used to develop the more basic building blocks for this computer. While it’s not the first 16-bit computer we’ve seen implemented on an FPGA, it is one of the few that builds its own RISC instruction set and associated software rather than cloning a known existing processor. We’ve also seen some interesting x86 implementations on an FPGA as well.

Thanks to [koen-ieee] for the tip!

Hey, MiSTer Emulator, Gimme Almost Any Classic Platform!

September 12, 2021 by 20 Comments

I’m back with another of the talks from Hackerspace Gent’s NewLine conference, fresh from my weekend of indulgence quaffing fine Belgian food and beers while mixing with that country’s hacker community. This time it’s an overview from [Michael Smith] of the MiSTer project, a multi-emulator using an FPGA to swap out implementations of everything from an early PDP minicomputer to an 80486SX PC.

At its heart is a dev board containing an Intel Cyclone SoC/FPGA, to which a USB hub must be added, and then a memory upgrade to run all but the simplest of cores. Once the hardware has been taken care of it almost seems as though there are no classic platforms for which there isn’t a core, as a quick browse of the MiSTer forum attests. We are treated to seamless switching between SNES and NED platforms, and even switching different SID chip versions during a running Commodore 64 demo.

There are many different routes to a decent emulator set-up be they using hardware, software, or a combination of both. It’s unlikely that there are any as versatile as this one though, and we’re guessing that as it further evolves it will become a fixture below the monitor or TV of any gamer.  It’s a step up from single-platform FPGA emulators, that’s for certain!

Continue reading “Hey, MiSTer Emulator, Gimme Almost Any Classic Platform!” →